Rational growth of branched nanowire heterostructures with synthetically encoded properties and function Xiaocheng Jiang Bozhi Tian., Jie Xiang Fang Qian 4, Gengfeng Zheng, Hongtao Wang.6. Liqiang Mai, and Charles M. Lieber aDepartment of Chemistry and Chemical Biology and School of Engineering and Applied Science, Harvard University, Cambridge, MA 02138 Contributed by Charles M. Lieber, June 2, 2011(sent for review May 25, 2011) Branched nanostructures represent unique, 3D building blocks defining functionality for device applications. More recently, the for the"bottom-up"paradigm of nanoscale science and technol. growth of branched heterostructures with different backbone and ogy. Here, we report a rational, multistep approach toward the branch compositions, including ZnSe/CdSe(19)and Zns/Cds general synthesis of 3D branched nanowire(NW) heterostructures. (20, 21), was reported using a multistep approach similar to that Single-crystalline semiconductor, including groups IV, Ill-V, and described in 2004 (12, 13). This work showed the possibility for II-VI, and metal branches have been selectively grown on core encoding distinct composition junctions at branch points through or core/shell NW backbones, with the composition, morphology, synthesis, but did not demonstrate the critical potential of sucl and doping of core(core/shell) NWs and branch NWs well con- branch junctions to serve as electronic and optoelectronic trolled during synthesis. Measurements made on the different devices. Here, we describe studies that extend in a substantial composition branched NW structures demonstrate encoding of manner the synthesis of branched NW heterostructures and, sig- functional p-type/n-type diodes and light-emitting diodes(LEDs) nificantly, that reveal well-defined electrical and optoelectronic backbone Nw structures were synthesized and used to demon- biological sensors. trate capability to create addressable nanoscale LED arrays, logic circuits,and biological sensors. Our work demonstrates a pre- Results and Discussion viously undescribed level of structural and functional complexity We have focused on two distinct classes of branched NWs, with NW materials, and more generally, highlights the potential of metal or semiconductor branches grown on either the native bottom-up synthesis to yield increasingly complex functional surface of semiconductor(type D)or on the oxide surface of core/ systems in the future. shell semiconductor/oxide( type II)NW backbones(Fig. 1). The synthesis involves two critical steps following synthesis of the core nanodevices I nanoelectronics I nanophotonics I biosensors I and core/shell NWs. First, gold nanoparticles(Au-NPs)are selec- tively deposited onto the respective backbone surfaces using either an in situ solution reduction of AuCl,- on Si-NW surfaces cal properties are central to the "bottom-up"approach for Methods). Transmission electron oscopy (TEM) images nanoscience and nanotechnology(1-6). To date, significant pro- demonstrate that these methods provide uniformly dispersed gress has been made in control of morphology, size, and compo- Au-NPs on the Si(Fig. SLA) and Si/ SiOz(Fig. SIC)NW surfaces, ition on length scales ranging from the atomic and up(1-28). and moreover, high-resolution TEM (HRTEM)images demon- Branched or tree-like NWs, in which one or more seconda strate intimate contact between Au-NPs and the Si(Fig. SIB)and NWs grow in a radial direction from a primary Nw backbone represent an especially interesting class of NW structures because F A and H W performed research: X1,BT, 1X, EQ,GZ, H.W. LM, and CML. branching naturally provides access to higher dimensionality. structures and the capability of achieving parallel connectivity analyzed data, and x.- B.- and C.M.L. wrote the paper. and interconnection during synthesis(12, 13). Indeed, well-con- The authors deare no conflict of interest. trolled variations in the composition and/or doping of backbone Freely available online through the PNAS open access option and branch NWs could make possible the design and realization xJ and B.T. contributed equally to this work of unique electronic and photonic nanodevices via encoding present address: Koch Institute for Integrative Cancer Research, Massachusetts Institute functionality synthetically at branch junctions of Technology, Cambridge, MA 02142 controlled synthesis of Si (12), GaN (12), and GaP(13)branched wesen ad C a k( 203 elecrical and Comp Previous studies of branched nw structures have led to several prese dvances. First, original work in 2004(12, 13)demonstrated the California, San Diego, CA Department of Chemistry and Biochemistry, University of California, NWs via a multistep nanocluster-catalyzed vapor-liquid-solid resent address: Laboratory of Advanced Materials and Department of Chemistry, Fudan nanoscale branches were defined independently from backbone university. Nw growth. Several groups have also employed a single-step, 310027, China "Present address: School of Aeronautics and Astronautics, Zhejiang University, Hangzhou, chemical vapor transport and condensation strategy to produce a wide range of straight or twisted semiconductor branched NWs echnology for Materials Synthesis and pbse ersity of Technology-Harvard Joint Nano Key Lab, Wuhan These studies have provided additional insight into growth To whom correspondence should be addressed. E-mail: cmlecmliris. harvard. edu nechanisms of branched nanostructures, but exhibited only lim information online at wy ookup/suppl/ ited control of the branch synthesis that is ultimately central to 12212-12216|PNAs|Juy26,2011lvol.108lno.30
Rational growth of branched nanowire heterostructures with synthetically encoded properties and function Xiaocheng Jianga,1, Bozhi Tiana,1,2, Jie Xianga,3, Fang Qiana,4, Gengfeng Zhenga,5, Hongtao Wangb,6, Liqiang Maia,7, and Charles M. Liebera,b,8 a Department of Chemistry and Chemical Biology and b School of Engineering and Applied Science, Harvard University, Cambridge, MA 02138 Contributed by Charles M. Lieber, June 2, 2011 (sent for review May 25, 2011) Branched nanostructures represent unique, 3D building blocks for the “bottom-up” paradigm of nanoscale science and technology. Here, we report a rational, multistep approach toward the general synthesis of 3D branched nanowire (NW) heterostructures. Single-crystalline semiconductor, including groups IV, III–V, and II–VI, and metal branches have been selectively grown on core or core/shell NW backbones, with the composition, morphology, and doping of core (core/shell) NWs and branch NWs well controlled during synthesis. Measurements made on the different composition branched NW structures demonstrate encoding of functional p-type/n-type diodes and light-emitting diodes (LEDs) as well as field effect transistors with device function localized at the branch/backbone NW junctions. In addition, multibranch/ backbone NW structures were synthesized and used to demonstrate capability to create addressable nanoscale LED arrays, logic circuits, and biological sensors. Our work demonstrates a previously undescribed level of structural and functional complexity in NW materials, and more generally, highlights the potential of bottom-up synthesis to yield increasingly complex functional systems in the future. nanodevices ∣ nanoelectronics ∣ nanophotonics ∣ biosensors ∣ designed synthesis Design and rational synthesis of semiconductor nanowire (NW) building blocks with well-defined structure and physical properties are central to the “bottom-up” approach for nanoscience and nanotechnology (1–6). To date, significant progress has been made in control of morphology, size, and composition on length scales ranging from the atomic and up (1–28). Branched or tree-like NWs, in which one or more secondary NWs grow in a radial direction from a primary NW backbone, represent an especially interesting class of NW structures because branching naturally provides access to higher dimensionality structures and the capability of achieving parallel connectivity and interconnection during synthesis (12, 13). Indeed, well-controlled variations in the composition and/or doping of backbone and branch NWs could make possible the design and realization of unique electronic and photonic nanodevices via encoding functionality synthetically at branch junctions. Previous studies of branched NW structures have led to several advances. First, original work in 2004 (12, 13) demonstrated the controlled synthesis of Si (12), GaN (12), and GaP (13) branched NWs via a multistep nanocluster-catalyzed vapor–liquid–solid (VLS) process, in which the diameter, length, and density of nanoscale branches were defined independently from backbone NW growth. Several groups have also employed a single-step, chemical vapor transport and condensation strategy to produce a wide range of straight or twisted semiconductor branched NWs, including ZnO (14, 15), WO3 (16), PbS (17), and PbSe (18). These studies have provided additional insight into growth mechanisms of branched nanostructures, but exhibited only limited control of the branch synthesis that is ultimately central to defining functionality for device applications. More recently, the growth of branched heterostructures with different backbone and branch compositions, including ZnSe∕CdSe (19) and ZnS∕CdS (20, 21), was reported using a multistep approach similar to that described in 2004 (12, 13). This work showed the possibility for encoding distinct composition junctions at branch points through synthesis, but did not demonstrate the critical potential of such branch junctions to serve as electronic and optoelectronic devices. Here, we describe studies that extend in a substantial manner the synthesis of branched NW heterostructures and, significantly, that reveal well-defined electrical and optoelectronic junction properties, including the demonstration of addressable nanoscale light-emitting diode (LED) arrays, logic circuits, and biological sensors. Results and Discussion We have focused on two distinct classes of branched NWs, with metal or semiconductor branches grown on either the native surface of semiconductor (type I) or on the oxide surface of core/ shell semiconductor/oxide (type II) NW backbones (Fig. 1). The synthesis involves two critical steps following synthesis of the core and core/shell NWs. First, gold nanoparticles (Au-NPs) are selectively deposited onto the respective backbone surfaces using either an in situ solution reduction of AuCl4 − on Si-NW surfaces for type I structures or binding of Au-NPs to the oxide surfaces of Si∕SiO2 core/shell NWs for type II structures (see Materials and Methods). Transmission electron microscopy (TEM) images demonstrate that these methods provide uniformly dispersed Au-NPs on the Si (Fig. S1A) and Si∕SiO2 (Fig. S1C) NW surfaces, and moreover, high-resolution TEM (HRTEM) images demonstrate intimate contact between Au-NPs and the Si (Fig. S1B) and Author contributions: X.J., B.T., L.M., and C.M.L. designed research; X.J., B.T., J.X., F.Q., G.Z., and H.W. performed research; X.J., B.T., J.X., F.Q., G.Z., H.W., L.M., and C.M.L. analyzed data; and X.J., B.T., and C.M.L. wrote the paper. The authors declare no conflict of interest. Freely available online through the PNAS open access option. 1 X.J and B.T. contributed equally to this work. 2 Present address: Koch Institute for Integrative Cancer Research, Massachusetts Institute of Technology, Cambridge, MA 02142. 3 Present address: Department of Electrical and Computer Engineering, University of California, San Diego, CA 92093. 4 Present address: Department of Chemistry and Biochemistry, University of California, Santa Cruz, CA 95064. 5 Present address: Laboratory of Advanced Materials and Department of Chemistry, Fudan University, Shanghai, 200438, China. 6 Present address: School of Aeronautics and Astronautics, Zhejiang University, Hangzhou, 310027, China. 7 Present address: State Key Laboratory of Advanced Technology for Materials Synthesis and Processing, Wuhan University of Technology–Harvard Joint Nano Key Lab, Wuhan University of Technology, Wuhan, 430070, China. 8 To whom correspondence should be addressed. E-mail: cml@cmliris.harvard.edu. This article contains supporting information online at www.pnas.org/lookup/suppl/ doi:10.1073/pnas.1108584108/-/DCSupplemental. 12212–12216 ∣ PNAS ∣ July 26, 2011 ∣ vol. 108 ∣ no. 30 www.pnas.org/cgi/doi/10.1073/pnas.1108584108
concentration, where the highest value obtained in our studies was ca. 50(see Materials and Methods) We further examined the Si/Au-branch Nw junctio diffraction (SAED). Lorng TEM and tures in more detail us w-resolution TEM images of Si/Au selective AU N branched NW junctions (e.g, Fig. S2A) show that Au Nw branch growth branches have approximately curved ends that contact the Si-nw backbone surfaces at the central region of the aul-branch NWS. A HRTEM image of the Si/Au junction(Fig 2B) shows the single-crystalline structure of Si-NW backbone and more Fig. 1. Schematic illustrating the general synthesis of W hetero. complex structure for the Au branch NW. Specifically, the Au es. Following the synthesis of bare(type I) branch exhibits modulations in the electron density in the central region of the nw parallel to the direction of branch axis, which are indicative of a twinned structure(29). Indeed, SAED patterns eous solution(metal branches)and vapor-phase (semiconductor branches) acquired to further illuminate the nature of these features zones for face-centered cubic Au(a=0.408 nm)(29), where Sio,(Fig. SID)surfaces. Second, the resulting Au NPs were used the branch Nw has overall fivefold twin symmetry(Fig. 2( as seeds or catalysts to define the nucleation and growth of Inset ). T hese results and model are consistent with the structure branch NWs on the backbones using either an aqueous solution- described previously by Murphy and coworkers(29) based method for metal branches and vapor-phase approaches NWs by vapor-pnase growth, where the Au-NPs function as for semiconductor branches We first examined the growth of metal and semiconductor alysts in a VLS process(1-3, 30)for branch elongation. SEM branch NWs for type I structures. Gold metal branch NWs were images of si/gGe(Fig. 2D) Si/GaAs (Fig. 2E), and Si/ GaP grown using a reported surfactant mediated methodology(29) in semiconductor branch growth from Si-NWbackbones with yield aqueous solution(see Materials and Methods ). A typical SEM image of Si/Au branched NW structures(Fig 2A)shows that >70% Moreover, our general approach can be extended to the diameter of 31+4 nm and average length of 620+100 nm. The ing Inp, InAs, Zns, ZnSe, CdS, and CdSe(see Matenials and overall yield of branches, which was determined with respect to Methods) f Si/Ge the total number of Au-NP nucleation catalysts, was greater than Si/InP(Fig. S2D) show that the interfaces between backbone these Au branches, 204, could be further improved by reducing pensive X-ray mapping of Si/Cds(Fig. S2F) demonstrates the distributions of si. cd and s in the backbone and branch. We note that the si backbone is free of cds homo genous shell coating or islands formation due to the well controlled nanocluster-catalyzed (30)branch synthesis. In addi tion. hrtem studies were carried out to further characterize the Si/semiconductor branched junctions. The HRTEM of the junctions of Si/Ge(Fig. 2G), Si/GaAs(Fig. 2H Si/InP(Fig. S2E) backbone/branch NWs show single-cry structures for all backbones and branches. These data also sug- gest that the backbone/branch interfaces remain structurally coherent in one or more crystallographic directions large lattice mismatches for the bulk crystals (31): 4.2% Si/Ge, 4.1% for Si/GaAs, and 8.1% for Si/InP) To further understand strain relaxation in these branched nw structures, we carried out stress field simulations(see Materials 200nm and Methods ). The simulation result for a Si/ GaAs backbone/ branch NW structure(Fig. 2n)shows that stresses are significant tn only in regions near the junctions(especially the junction bound ns of negligible magnitude at distances longer than the diameter of branch from the junction region. The possibility of efficient strain relaxation in branched nw heterostructures could m significantly expand our choices for backbone and branch mate Fig.2. Structural characterization of type I branched Nw heterostructures. properties Can enable unique device concepts with enhanced rials. which (A)SEM image of Si/Au branched NWs. (B) HRTEM image of Si/Au branched We have also explored a variety of type II branched Nw struc- nction; red arrow highlights twin plane (O SAED pattern of the junction tures because it represents another important category of struc- gion shown in B, where blue and green spots originate from (100)Au, tural/functional integration, where metal or semiconductor 112)Au zone diffraction, and yellow spots are from the crystalline Si back. branches can be grown on Si/SiO, core/shell NW backbones of five twinned subunits. red arrow marks the incident beam direction. following the same approaches described above. SEM images (D-F)SEM images of Si/Ge(D), (E) and Si/GaP (f) branched Nws. of Si/sioz/Au(Fig. 34) and Si/SiO2/Ge (Fig 3C) branched logies similar to their respective type Simulated von Mises stress field at Si/ GaAs branched junction. The scale analogs. The HRTEM images of both Si/Sio2/Au(Fig. 3B) bar range is from31×106to16×1010Pa and Si/Sio2/Ge(Fig. 3D) branched junctions show clearly an PNAs I July 26, 2011 I voL. 108 I no 30
SiO2 (Fig. S1D) surfaces. Second, the resulting Au-NPs were used as seeds or catalysts to define the nucleation and growth of branch NWs on the backbones using either an aqueous solutionbased method for metal branches and vapor-phase approaches for semiconductor branches. We first examined the growth of metal and semiconductor branch NWs for type I structures. Gold metal branch NWs were grown using a reported surfactant mediated methodology (29) in aqueous solution (see Materials and Methods). A typical SEM image of Si∕Au branched NW structures (Fig. 2A) shows that Au branches grown in this manner are uniform with an average diameter of 31 4 nm and average length of 620 100 nm. The overall yield of branches, which was determined with respect to the total number of Au-NP nucleation catalysts, was greater than 40% for these reaction conditions. The average aspect ratio of these Au branches, 20 4, could be further improved by reducing the Au-reactant concentration and/or increasing the surfactant concentration, where the highest value obtained in our studies was ca. 50 (see Materials and Methods). We further examined the Si∕Au-branch NW junction structures in more detail using TEM and selected area electron diffraction (SAED). Low-resolution TEM images of Si∕Au branched NW junctions (e.g., Fig. S2A) show that Au NW branches have approximately curved ends that contact the Si-NW backbone surfaces at the central region of the Au-branch NWs. A HRTEM image of the Si∕Au junction (Fig. 2B) shows the single-crystalline structure of Si-NW backbone and more complex structure for the Au branch NW. Specifically, the Au branch exhibits modulations in the electron density in the central region of the NW parallel to the direction of branch axis, which are indicative of a twinned structure (29). Indeed, SAED patterns acquired to further illuminate the nature of these features (Fig. 2C) can be indexed as a superposition of h112i and h100i zones for face-centered cubic Au (a ¼ 0.408 nm) (29), where the branch NW has overall fivefold twin symmetry (Fig. 2C, Inset). These results and model are consistent with the structure described previously by Murphy and coworkers (29). We have also synthesized a variety of semiconductor branch NWs by vapor-phase growth, where the Au-NPs function as catalysts in a VLS process (1–3, 30) for branch elongation. SEM images of Si∕Ge (Fig. 2D), Si∕GaAs (Fig. 2E), and Si∕GaP (Fig. 2F) backbone/branch NW structures show the uniform semiconductor branch growth from Si-NW backbones with a yield >70%. Moreover, our general approach can be extended to the growth of other III–Vand II–VI semiconductor branches, including InP, InAs, ZnS, ZnSe, CdS, and CdSe (see Materials and Methods). TEM images of Si∕Ge (Fig. S2B), Si∕GaAs (Fig. S2C), and Si∕InP (Fig. S2D) show that the interfaces between backbone and branch NWs are clean and abrupt. In addition, energy dispersive X-ray mapping of Si∕CdS (Fig. S2F) demonstrates the spatially controlled distributions of Si, Cd, and S in the backbone and branch. We note that the Si backbone is free of CdS homogenous shell coating or islands formation due to the wellcontrolled nanocluster-catalyzed (30) branch synthesis. In addition, HRTEM studies were carried out to further characterize the Si/semiconductor branched junctions. The HRTEM images of the junctions of Si∕Ge (Fig. 2G), Si∕GaAs (Fig. 2H), and Si∕InP (Fig. S2E) backbone/branch NWs show single-crystalline structures for all backbones and branches. These data also suggest that the backbone/branch interfaces remain structurally coherent in one or more crystallographic directions despite the large lattice mismatches for the bulk crystals (31): 4.2% for Si∕Ge, 4.1% for Si∕GaAs, and 8.1% for Si∕InP). To further understand strain relaxation in these branched NW structures, we carried out stress field simulations (see Materials and Methods). The simulation result for a Si/GaAs backbone/ branch NW structure (Fig. 2I) shows that stresses are significant only in regions near the junctions (especially the junction boundary), of dimensions comparable to 1∕4 branch width, and produce deformations of negligible magnitude at distances longer than the diameter of branch from the junction region. The possibility of efficient strain relaxation in branched NW heterostructures could significantly expand our choices for backbone and branch materials, which can enable unique device concepts with enhanced properties. We have also explored a variety of type II branched NW structures because it represents another important category of structural/functional integration, where metal or semiconductor branches can be grown on Si∕SiO2 core/shell NW backbones following the same approaches described above. SEM images of Si∕SiO2∕Au (Fig. 3A) and Si∕SiO2∕Ge (Fig. 3C) branched NWs exhibit morphologies similar to their respective type I analogs. The HRTEM images of both Si∕SiO2∕Au (Fig. 3B) and Si∕SiO2∕Ge (Fig. 3D) branched junctions show clearly an Fig. 1. Schematic illustrating the general synthesis of branched NW heterostructures. Following the synthesis of bare (type I) or core/shell (type II) NWs, Au-NPs are selectively deposited onto the respective backbone surfaces and then used as seeds or catalysts to define the nucleation and growth of branch NWs on the backbones. Branch NWs are synthesized using established aqueous solution (metal branches) and vapor-phase (semiconductor branches) methods. Fig. 2. Structural characterization of type I branched NW heterostructures. (A) SEM image of Si∕Au branched NWs. (B) HRTEM image of Si∕Au branched junction; red arrow highlights twin plane. (C) SAED pattern of the junction region shown in B, where blue and green spots originate from h100iAu, h112iAu zone diffraction, and yellow spots are from the crystalline Si backbone. (Inset) Cross-sectional model of the penta-twinned Au branch consisting of five twinned subunits. Red arrow marks the incident beam direction. (D–F) SEM images of Si∕Ge (D), Si∕GaAs (E), and Si∕GaP (F) branched NWs. (G and H) HRTEM images of Si∕Ge (G) and Si∕GaAs (H) branched junctions. (I) Simulated von Mises stress field at Si∕GaAs branched junction. The scale bar range is from 3.1 × 106 to 1.6 × 1010 Pa. Jiang et al. PNAS ∣ July 26, 2011 ∣ vol. 108 ∣ no. 30 ∣ 12213 CHEMISTRY
B A B D Fig. 4. Single-branch input devices. (A) linal -V characteristics of -n diodes encoded at p-Si/n-Ge(blue), p-Si/n-GaAs (red), and p-si/n-CdSe torange) branched junctions. (B)/V curve of the same p-si/n-GaAs diode on semilog scale: the slope(blue dashed line) yields an ideality factor Si/Sio2/Au branched NWs.(8)HRTEM image of Si/SiO2/Au n-Ge(@ and p-si/Sio, Au(D) branched junctions, respectively. a source drain voltage of 0.5 v was used in the measuremen ttern from the yellow square region, indexed as a superposition of [001] blue)and (-112(green) zone patterns. The marked yellow spot in the FFT attern is one of the associated double diffraction reflections, where gate electrode(Fig. 4C, Inset, and D, Inset and Fig S3B and C) b+c(C and D)SEM(O) and HRTEM(D)images of Si/Sio2/Ge branched Current (Isd)vs. branch-gate voltage(g) data recorded on NW p-Si/SiO2/n-Ge(Fig. 4C)and p-Si/Sio2/Au(Fig. 4D)branched NW FETS at a source-drain voltage of 0.5 V show a characteristic orphous layer sandwiched between crystalline Si-backbone depletion mode FET behavior(31), with a turnoff current nd branch NWs, which is consistent with our design for type 100 pA and on/off ratio 10. The calculated subthreshold II structures. Analysis of the Au branch last close to the junction slopes for these two nanoscale FEt devices are 120 and (Fig. 3B, Inset)shows the superposition of( 112)and(100) zone 150 mV/decade, respectively. The subthreshold values, which patterns and indicates the Au branch grows along the(110) indicate good gate coupling, are especially notable given that direction, the same as in Si/Au branched NWs. We note that the gate lengths for the n-Ge and Au-branch devices are only the sio, shell on these si-nw backbones can be ly extended 30 and 35 nm, respectively In addition, we have investigated additional functional proper ic layer deposition(32)and has the potential to significantly ties for synthetically encoded branch/backbone NW structures as d the scope of functionalities defined at the branched well as the incorporation of multiple functional branches. First, we have characterized the photonic properties of p-Si/n-GaAs We have fabricated and measured single-branch/backbone backbone/branch heterostructures, where the direct-band-gap NW devices to examine the potential for encoding of functional GaAs branch can yield light emission in a forward biased diode (FET Properties such as p-n diodes and field effect transistors (34). Significantly, electroluminescence(EL)data recorded from by synthesis(see Materials and Methods; Fig. S3). For a p-si/n-GaAs device(Fig 5A)exhibits highly localized emission ample, p-n diodes should be encoded at the junction of from the branch junction in forward bias, thus making these p-Si-NW backbone and n-type semiconductor branch, where we point-like, nanoscale active emitters(nanoLEDs). The EL spec- n-CdSe branches. Two-terminal electrical transport measure. responding tis tihen fraas the branch unctions was robust; that ackbone/branch NW structures(Fig 4A)all exhibit clear ated on/off cycles did not affect th rectification with threshold voltages of approximately and studies of over 20 p-Si/n-GaAs nanoLEDs yielded similar consistent with expectations for p-n diode(31). More characterization of the Si/GaAs p-n diode(Fig. 4B )yields a room We have exploited the reproducibility and robustness of the temperature ideality factor, n, of 2.4. Although the n value indi- p-si/n-GaAs nanoLEDs to study an addressable array consisting ates surface recombination in the diode(33)and suggests that of three n-GaAs Nw branches on p-Si-NW backbone(Fig 5B) further optimization could be achieved in the future, the present When a forward bias was applied to turn on one(Fig 5B, Upp sults nevertheless demonstrate our capability to independently Right ), two(Fig. 5B, Lower Left), or three(Fig 5B, Lower Right) define the doping profile of backbone and branch NWs necessary nanoLEDs sequentially, EL measurements demonstrate loca- for encoding device function lized and addressable emission only from the junctions in forward We have also examined the potential for encoding nanoscale bias. Moreover, we have assembled and characterized seven FETs in type II branched NWs, where p-Si-NW backbone serves robust nanoLEDs within a 100 x 100 um- area(Fig. S4), thu as the active semiconductor channel, the Sio, shell layer as the demonstrating the potential of this bottom-up approach for gate dielectric, and heavily doped n-Ge or Au-branch NWs as larger-scale integration of these unique photonic devices. nanoscale gate electrodes. Source and drain contacts were In addition, the concept of synthetically encoding multiple defined on p-Si-NW backbone, and an additional contact was functional branch devices has been used to investigate their made at the end of n-Ge or Au branch as voltage input for the potential as logic gates. A two branch input FETconfigured from 12214iwww.pnas.org/cgi/doi/10.1073/pnas.1108584108 Jiang et al
amorphous layer sandwiched between crystalline Si-backbone and branch NWs, which is consistent with our design for type II structures. Analysis of the Au branch last close to the junction (Fig. 3B, Inset) shows the superposition of h112i and h100i zone patterns and indicates the Au branch grows along the h110i direction, the same as in Si∕Au branched NWs. We note that the SiO2 shell on these Si-NW backbones can be readily extended to other types of functional materials conformally deposited by atomic layer deposition (32) and has the potential to significantly expand the scope of functionalities defined at the branched junctions. We have fabricated and measured single-branch/backbone NW devices to examine the potential for encoding of functional device properties such as p-n diodes and field effect transistors (FETs) by synthesis (see Materials and Methods; Fig. S3). For example, p-n diodes should be encoded at the junction of p-Si-NW backbone and n-type semiconductor branch, where we have synthesized and studied structures with n-Ge, n-GaAs, and n-CdSe branches. Two-terminal electrical transport measurements recorded on p-Si∕n-Ge, p-Si∕n-GaAs, and p-Si∕n-CdSe backbone/branch NW structures (Fig. 4A) all exhibit clear current rectification with threshold voltages of approximately 1.0 V, consistent with expectations for p-n diode (31). More detailed characterization of the Si∕GaAs p-n diode (Fig. 4B) yields a room temperature ideality factor, n, of 2.4. Although the n value indicates surface recombination in the diode (33) and suggests that further optimization could be achieved in the future, the present results nevertheless demonstrate our capability to independently define the doping profile of backbone and branch NWs necessary for encoding device function. We have also examined the potential for encoding nanoscale FETs in type II branched NWs, where p-Si-NW backbone serves as the active semiconductor channel, the SiO2 shell layer as the gate dielectric, and heavily doped n-Ge or Au-branch NWs as nanoscale gate electrodes. Source and drain contacts were defined on p-Si-NW backbone, and an additional contact was made at the end of n-Ge or Au branch as voltage input for the gate electrode (Fig. 4 C, Inset, and D, Inset and Fig. S3 B and C). Current (Isd) vs. branch-gate voltage (Vg) data recorded on p-Si∕SiO2∕n-Ge (Fig. 4C) and p-Si∕SiO2∕Au (Fig. 4D) branched NW FETs at a source-drain voltage of 0.5 V show a characteristic depletion mode FET behavior (31), with a turnoff current 104. The calculated subthreshold slopes for these two nanoscale FET devices are 120 and 150 mV∕decade, respectively. The subthreshold values, which indicate good gate coupling, are especially notable given that the gate lengths for the n-Ge and Au-branch devices are only 30 and 35 nm, respectively. In addition, we have investigated additional functional properties for synthetically encoded branch/backbone NW structures as well as the incorporation of multiple functional branches. First, we have characterized the photonic properties of p-Si∕n-GaAs backbone/branch heterostructures, where the direct-band-gap GaAs branch can yield light emission in a forward biased diode (34). Significantly, electroluminescence (EL) data recorded from a p-Si∕n-GaAs device (Fig. 5A) exhibits highly localized emission from the branch junction in forward bias, thus making these point-like, nanoscale active emitters (nanoLEDs). The EL spectrum (Fig. 5A, Lower) exhibits a peak maximum at 860 nm, corresponding to the GaAs band-edge emission. We note that the localized emission from the branch junctions was robust; that is, repeated on/off cycles did not affect the emission properties, and studies of over 20 p-Si∕n-GaAs nanoLEDs yielded similar results. We have exploited the reproducibility and robustness of the p-Si/n-GaAs nanoLEDs to study an addressable array consisting of three n-GaAs NW branches on p-Si-NW backbone (Fig. 5B). When a forward bias was applied to turn on one (Fig. 5B, Upper Right), two (Fig. 5B, Lower Left), or three (Fig. 5B, Lower Right) nanoLEDs sequentially, EL measurements demonstrate localized and addressable emission only from the junctions in forward bias. Moreover, we have assembled and characterized seven robust nanoLEDs within a 100 × 100 um2 area (Fig. S4), thus demonstrating the potential of this bottom-up approach for larger-scale integration of these unique photonic devices. In addition, the concept of synthetically encoding multiple functional branch devices has been used to investigate their potential as logic gates. A two branch input FETconfigured from Fig. 3. Structural characterization of type II branched NW heterostructures. (A) SEM image of Si∕SiO2∕Au branched NWs. (B) HRTEM image of Si∕SiO2∕Au junction. The black line marks the SiO2∕Si interface. (Lower Right Inset) FFT pattern from the yellow square region, indexed as a superposition of [001] (blue) and ½−112 (green) zone patterns. The marked yellow spot in the FFT pattern is one of the associated double diffraction reflections, where a ¼ b þ c. (C and D) SEM (C) and HRTEM (D) images of Si∕SiO2∕Ge branched NW. Fig. 4. Single-branch input devices. (A) Two-terminal I–V characteristics of p-n diodes encoded at p-Si∕n-Ge (blue), p-Si∕n-GaAs (red), and p-Si∕n-CdSe (orange) branched junctions. (B) I–V curve of the same p-Si∕n-GaAs diode on semilog scale; the slope (blue dashed line) yields an ideality factor n ¼ 2.4. (C and D) I–Vg curves of nanoscale FETs encoded at p-Si∕SiO2∕ n-Ge (C) and p-Si∕SiO2∕Au (D) branched junctions, respectively. A sourcedrain voltage of 0.5 V was used in the measurement. 12214 ∣ www.pnas.org/cgi/doi/10.1073/pnas.1108584108 Jiang et al.
LED have also demonstrated or and al from the integration A B of p-si/n-Ge branch diodes(Fig. l, these results sug est that the branched and hyper (13)NW structures epresent a potentially powerful ap developing com- plex logic circuits with some analogy to highly branched and Interc Finally, we investigated the branched nw devices as nanoelec- tronic sensors for detection of biological molecules (36), where the Au branches can act as"antenna" for analyte after modifica tion with receptors. In contrast to previous studies that modified oxide surfaces of the nanowire and substrate(37, 38), we selec- tively modified Au branches with antibodies using reactive thiols (see Materials and Methods). Conductance vs time data recorded rom a monoclonal antibody modified p-si/ Au-branch NW FEt as prostate specific antigen(PSA)and buffer solutions are deliv ered to the device(Fig. 5E) demonstrate concentration-depen Logic dent binding and unbinding of PSa with a detection limit of C D 80 pg/mL for signal-to-noise ratio of >3. Control experiments (Fig. 5F)using BSA and unbranched Si-NW FETS further de monstrate the excellent selectivity of Si/Au-branch NW sensor Conclusions wvw匚V In summary, we report a rational, multistep approach for the gen eral synthesis of branched nanowire heterostructures and demon- strate the encoding of electronic and optoelectronic functions at branched junctions through controlled synthesis Single-crystal 001|300 line semiconductors, including groups IV, Ill-V, and II-VI and metal branches have been selectively grown on core or core/ shell NW backbones via vapor- and solution-phase method Biosensor With precise control over composition and doping, we demon- strate reliable p-n diode, LED, and FET device characteristics E encoded at the branch junctions. Furthermore, we have demon- strated the potential to create more complicated structures and s 北 functional device-based backbone/multibranch NW structures, 5 including addressable nanoLED arrays, logic circuits, and biolo- gical sensors. Our work highlights the power and potential of synthetically encoding functionalities at branch junctions, and more generally, bottom-up synthesis for the development of increasingly complex functional systems in the future. Materials and Methods Fig. 5. Multibranch input devices. (A and -GaAs branched nano. LEDs. (A)Three-dimensional EL intensity plot (Middle), SEM image(Top). um (Bottom) of a single p-Si/n-GaAs branched nanoLED (39). Si/SiO2 core-shell NWs )Schematic(Upper Left) of an LED array consisting of three p-Si/n-GaA O2(flow rate: 50 scam; pressure: 40 torr) at 700C for 1-3 h: the OLEDs, and EL images when a forward bias of 10 v was applied to oxide layer thickness was 2-5 nm, respectively ially turn on one(Upper Right), two(Lower Left), or three(Lower Right) ons.(C and D) NOR logic gate based on two sequential Selective Deposition of Au Nand Si NWs by g Si/SiO2/Ge branch junctions (O)The output voltage vs the four possible logic hydrogen fluoride solution for 1 min to produce hydrogen-terminated sur- address level inputs(0,1).(0,0), (1,0), and (1, ).(nset) SEM image of the face, and then resulting Si Nws were immersed in HAuCla solution and experimental truth table for the NOR gate. The solid and dashed red (1-5x 10-5 M)for 5-10 min. The HAuCl4 solution concentration and re ion time was varied to control the Au-nP density and size, with highe 月 Biological ser d s. time curve recorded on a p-Si/Au branched NW with alternate Au-NPs were deposited on the SiOz surfaces of Si/SiO2 core/shell NWs in a elivery of PSA (4 ng/mL, 80 pg/mL, 200 ng/mL) and pure buffer solutions. two-step process. First, the Si/Sioz NWs were immersed in 0. 1% polylysine he red and purple arrows mark the delivery of protein and buffer solution olution(molecular weight: 150 k-300 k, Ted Pella)and rinsed thoroughly into the sensing channel, respectively. (Inset) Schematic of Si/Au branched with deionized water. Second, the polylysine modified NWs were placed NW sensor. (F) Conductance vs. time data recorded on Si/Au branched in the solution of citrate stabilized Au-NPs(15 nm, 1.4x 10/mL, Ted Pella) NW sensor with alternating delivery of 4 ng/mL of PSA and 4 ug/mL of for 5 min, followed by gentle rinse with deionized water. BSA solutions(blue curve), and on bare Si-Nw device(modified as the au branches) with delivery of 4 ug/mL of PSA solution(green curve) Synthesis of Si/Au and Si/SiO2/Au branched NWs. Si or Si/SiO2 NWs with deposited Au- e dispersed on Sio, surfaces of Si substrates(60 nm oxide, n-type 0.005 @2-cm, Nova Electronic Materials) from isopropanol a type II Si/Sio2/Ge branched NW structure(Fig. 5C)show dried with N,, and then annealed at 200c for 10 min. Au that when either one or both of the inputs were high (3 V) NWs in a solution containing HAuCl4 (2x 10-4-1 x 10-3M),ascor the p-Si-NW backbone FEToutput was low or off, but when both bic acid(4x10--2x 10-3M), and cetyl trimethylammonium bromide puts were low(0 V), the FET output was high. More complete ( CTAB)(0.025-01 M)(29)for 12-24 h in the dark. A Au-NW aspect ratio up characterization of the input-output characteristics(Fig. 5D)are to 50 can be achieved under optimal growth conditions with 1 x 10-M all consistent with two-input NOR logic gate(35). Similarly, we HAuCla, 2 x 10-M ascorbic acid, and 0.1 CTAB PNAS I July26.2011|wol.108|no.3012
a type II Si∕SiO2∕Ge branched NW structure (Fig. 5C) shows that when either one or both of the inputs were high (3 V) the p-Si-NW backbone FEToutput was low or off, but when both inputs were low (0 V), the FET output was high. More complete characterization of the input–output characteristics (Fig. 5D) are all consistent with two-input NOR logic gate (35). Similarly, we have also demonstrated OR and AND gates from the integration of p-Si∕n-Ge branch diodes (Fig. S5). Overall, these results suggest that the branched and hyperbranched (13) NW structures represent a potentially powerful approach for developing complex logic circuits with some analogy to highly branched and interconnected neuronal systems. Finally, we investigated the branched NW devices as nanoelectronic sensors for detection of biological molecules (36), where the Au branches can act as “antenna” for analyte after modification with receptors. In contrast to previous studies that modified oxide surfaces of the nanowire and substrate (37, 38), we selectively modified Au branches with antibodies using reactive thiols (see Materials and Methods). Conductance vs. time data recorded from a monoclonal antibody modified p-Si∕Au-branch NW FET as prostate specific antigen (PSA) and buffer solutions are delivered to the device (Fig. 5E) demonstrate concentration-dependent binding and unbinding of PSA with a detection limit of 80 pg∕mL for signal-to-noise ratio of >3. Control experiments (Fig. 5F) using BSA and unbranched Si-NW FETs further demonstrate the excellent selectivity of Si/Au-branch NW sensor. Conclusions In summary, we report a rational, multistep approach for the general synthesis of branched nanowire heterostructures and demonstrate the encoding of electronic and optoelectronic functions at branched junctions through controlled synthesis. Single-crystalline semiconductors, including groups IV, III–V, and II–VI, and metal branches have been selectively grown on core or core/ shell NW backbones via vapor- and solution-phase methods. With precise control over composition and doping, we demonstrate reliable p-n diode, LED, and FET device characteristics encoded at the branch junctions. Furthermore, we have demonstrated the potential to create more complicated structures and functional device-based backbone/multibranch NW structures, including addressable nanoLED arrays, logic circuits, and biological sensors. Our work highlights the power and potential of synthetically encoding functionalities at branch junctions, and more generally, bottom-up synthesis for the development of increasingly complex functional systems in the future. Materials and Methods Backbone NW Synthesis. Si-NW backbones were synthesized using nanocluster-catalyzed chemical vapor deposition method reported previously (39). Si∕SiO2 core-shell NWs were prepared by oxidation of Si NWs in pure O2 (flow rate: 50 sccm; pressure: 40 torr) at 700 °C for 1–3 h; the resulting oxide layer thickness was 2–5 nm, respectively. Selective Deposition of Au Nanoparticles. Au-NPs were deposited on bare Si NWs by galvanic surface reduction (40). First, Si NWs were etched in 5% hydrogen fluoride solution for 1 min to produce hydrogen-terminated surface, and then resulting Si NWs were immersed in HAuCl4 solution (1 − 5 × 10−5 M) for 5–10 min. The HAuCl4 solution concentration and reaction time was varied to control the Au-NP density and size, with higher HAuCl4 and longer reaction time resulting in larger and denser Au-NPs. Au-NPs were deposited on the SiO2 surfaces of Si∕SiO2 core/shell NWs in a two-step process. First, the Si∕SiO2 NWs were immersed in 0.1% polylysine solution (molecular weight: 150 k–300 k, Ted Pella) and rinsed thoroughly with deionized water. Second, the polylysine modified NWs were placed in the solution of citrate stabilized Au-NPs (15 nm, 1.4 × 1010∕mL, Ted Pella) for 5 min, followed by gentle rinse with deionized water. Synthesis of Si∕Au and Si∕SiO2∕Au branched NWs. Si or Si∕SiO2 NWs with deposited Au-NPs were dispersed on SiO2 surfaces of Si substrates (600- nm oxide, n-type 0.005 Ω-cm, Nova Electronic Materials) from isopropanol solutions, dried with N2, and then annealed at 200 °C for 10 min. Au branched NWs were then grown by immersing the respective substrates with dispersed NWs in a solution containing HAuCl4 (2 × 10−4 − 1 × 10−3 M), ascorbic acid (4 × 10−4 − 2 × 10−3 M), and cetyl trimethylammonium bromide (CTAB) (0.025–0.1 M) (29) for 12–24 h in the dark. A Au-NW aspect ratio up to 50 can be achieved under optimal growth conditions with 1 × 10−3 M HAuCl4, 2 × 10−3 M ascorbic acid, and 0.1 M CTAB. Fig. 5. Multibranch input devices. (A and B) p-Si∕n-GaAs branched nanoLEDs. (A) Three-dimensional EL intensity plot (Middle), SEM image (Top), and EL spectrum (Bottom) of a single p-Si∕n-GaAs branched nanoLED. (B) Schematic (Upper Left) of an LED array consisting of three p-Si∕n-GaAs nanoLEDs, and EL images when a forward bias of 10 V was applied to sequentially turn on one (Upper Right), two (Lower Left), or three (Lower Right) branch junctions. (C and D) NOR logic gate based on two sequential Si∕SiO2∕Ge branch junctions. (C) The output voltage vs. the four possible logic address level inputs: (0,1), (0,0), (1,0), and (1,1). (Inset) SEM image of the branched device. Scale bar, 2 μm. (D) The output–input (Vo-Vi) relation and experimental truth table for the NOR gate. The solid and dashed red (blue) lines show Vo-Vi1 and Vo-Vi2 when the other input is 0 (1). (E and F) Biological sensor based on Si∕Au branched NW FETs. (E) Conductance vs. time curve recorded on a p-Si∕Au branched NW sensor with alternate delivery of PSA (4 ng∕mL, 80 pg∕mL, 200 ng∕mL) and pure buffer solutions. The red and purple arrows mark the delivery of protein and buffer solutions into the sensing channel, respectively. (Inset) Schematic of Si∕Au branched NW sensor. (F) Conductance vs. time data recorded on Si∕Au branched NW sensor with alternating delivery of 4 ng∕mL of PSA and 4 μg∕mL of BSA solutions (blue curve), and on bare Si-NW device (modified as the Au branches) with delivery of 4 μg∕mL of PSA solution (green curve). Jiang et al. PNAS ∣ July 26, 2011 ∣ vol. 108 ∣ no. 30 ∣ 12215 CHEMISTRY
Synthesis of Si/semiconductor and Si/Sio2/semiconductor branched NWs. Si or The Au branches were modified in two steps. First, the devices were reacted posited Au-NPs were dispersed on SiOz surface of heavily with a 10 mg/mL solution of DMSO( Sigma-Aldrich) for approximately 4 h, followed by extensive rinsing with DMSO. Anti-PSA (Abl, clone ER-PR8, Neo- as phase growth system to prepare branched semiconductor NWs. Ge Markers)was then coupled to the succinimidyl(NHS)-terminated Au branches 15 min with the flow of 10 sce urfaces by reaction of 10-20 ug/mL antibody in a pH 8.4, 10 mM phosphate GeHa(10%), 10 sccm PHa(1,000 ppm in H2), and 200 scam H2 as described buffer solution for a period of 2-4 h Unreacted NHS groups were subse previously (41). The growth of other Ill-V and ll-VI branches was achieved quently passivated by reaction with ethanolamine under similar conditions. y thermal evaporation and vapor transport method (42).Powders with psa and BSa protein samples in 1 uM phosphate buffer solution(pH, 7. 4) the same composition were put into the center of the quartz tube, which were flowed under a flow rate of 0.30-0.60 mL/h through the microfluidic approximately 400-600C 30 scam of Hz was used as the carrier gas, an channel while monitoring the branch nanowire device properties as de. pressure was kept at 40 scribed in detail elsewhere (37) devices were fabricated on Sioz surface of g< multiple-branch input Stress Field Simulation Stress field simulations were carried out using finite ele in Si/GaAs branched structure. we took the axis of gaas branch and si lithography(43)followed by thermal of metals. Ti/Pd(5/50 nm) backbone as(111)and (211), respectively, and the following material con- ntacts were used for both Si and Ge NWs: Ti/Al/Pd/Au(20/80/20/30 n tants are used: modulus of elasticity, Gu(GaAs)=1.18 x 10Pa, C12(GaAs) ontacts were used for other II-V and I-VI semiconductor NWs. Current- 0.538 x 1011 Pa, aA=0.594×1011Pa,c1is=1.662×101Pa,cns)= oltage (-v) data were recorded using an Agilent semiconductor parameter 664x 10 Pa, Ca4(si)=0.798x 10 Pa; lattice constant, asa)=0.543 nm halyzer(Model 4156o) with contacts to devices made using a probe station a(GaAs)=0.565 nm; backbone to branch width ratio, 2: 1 esert Cryogenics, Model TTP4) EL from branched NW structures was char- luminescence ment(44). Arrays of AcKNOWLEDGMENTS We thank profs. R.Gordon and /Au-NP Nw devices were defined by photolithography (37). Ti/Pd Drs. H. Yan, Y. Dong, J. Huang, Y. Wu, B deposited by thermal evaporation and then discussions and constructive comments on passivated by subsequent deposition of 50-nm thick Si3 N4 coating(37). The edges support of this work by the Air Fo completed device chip was subject to Au-branch growth as described above. and a National Security Science and Engine on the man ffice of so search Faculty Fellow award. 1. Hu J, Odom T, Lieber CM(1999)Chemistry and physics in one dimension: Synthesis 23. Dick KA, et al. (2006)Position-controlled interconnected InAs nanowire networks. Nanoscale science and technology. Building a big future from small 24. Suyatin DB, et al. (2008)Electrical properties of self-assembled branched InAs Lett8:11001104. 3. LiY, Qian F, Xiang J, Lieber CM(2006)Nanowire electronic and op 25. Gautam UK, Fang x Bando Y, Zhan J, Golberg D (200 branched ZnS nanotube-In nanowire Semiconductor nanowires and nanotubes. Annu 26. Meng G, et al. (2009)A ge 5. Thelander C et al. (2006)Nanowire- based one-dimensional electronics. Mater Today nanotube and nanotube/nanowire/nanotube heterojunctions with branched topol- 6. Wang ZL (2004)Functional oxide nanobelts: Materials, properties 27. Chen B, et al. (2010 their connections with gold nanowires in both linear and branched topologies. ACS Nano 4: 7105-7112 7. Gudiksen MS, Lauhon U, Wang I, Smith DC, Lieber CM(2002) Growth Jun K, Jacobson JM(2010)Programmable growth of branched silicon nanowires using 8. Wu Y, Fan R, Yang P (2002) Block-by-block growth of single-crysta 29.Jo C Dujardin E, Davis SA Murphy C, Mann S(2002)Growth and form of gold 9. Bjork MT, et al. (2002)One-dimensional heterostructures in semiconductor nanowhis- 12:1765-177 10. Lauhon L, Gudiksen MS, Wang D, Lieber CM (2002) Epitaxial core-shell and core- nthesis of crystalline Science 279: 208- 31 11. Tian B, Xie P, Kempa T3, Bell DC, Lieber CM(2009)Single crystalline kinked semicon- 32. Hausmann DM, Kim, iconductor Devices (Wiley, New York) 12. Dick KA, et al. (2004) sis of branched 'nanotrees' by controlled seeding of multi- Mater14:43504358. 33. Mzhari B, Morkoc H (1993)Surface recombinationin GaAs PN junction diode. J/ 13. Wang onal growth of branched and Lett4871-874 34. Huang Y, Duan X Lieber CM(2005) Nanowires for integrated multicolor Self-assembled nanowire-nanoribbon junction 5. Huang Y, et al. (2001)Logic gates and computation from assembled nanowin 15. Yan HQ. He RR, Pham J, Yang pD (2003)Morphogenesis of one-dimensional Zno no-and microcrystals. Adv Mater 15: 402-405 36. Cui Y, Wei Q, Park H, Lieber CM(2001)N 16. Zhou ], et al. (2005) Three-dimensional tungsten oxide nar selective detection of biological and chemical species. Science 293: 1289-1292. 37. Zheng G, Patolsky F, Cui Y, Wang wU, Lieber CM(2005) 17. Bierman M, Lau YKA, Kvit AV, Schmitt AL Jin S(2008)Dislocation-driven Science320:1060-1063. ation of chiral branched nanowires by the Eshelby Twist. 39. Wh ed growth and structures of molecular-scale silicon nano- R Buhro WE (2007) Solution-b no-and heterobranched semiconductor nanowires. J Am Chem Soc 41. Greytak AB, Lauhon U, Gudiksen MS, Liebe es of complementary germanium nanowire field-effect transistors. App! Phys Lett 20. Jung Y, Ko DK, Agarwal R (2007) Synthesis and structural characterization of single- 4:41764178. heterostructures as high electron 21. Zhou al.(2008)Controllable fabrication of high-quality 6-fold symmetry- mobility devices". Nano Lett 7: 3214-3218. ranched Cds nanostructures with ZnS nanowires as templates. J Phys Chem c 43. Cui Y, Zhong z, Wang D, 22 Milliron D), et aL. (2004)Colloidal nanocrystal heterostructures with linear and 44. Qian F, Gradecak S,ui Y, Wen Y, Lieber CM(2005)Corel multishell nanowire hetero- branched topology. Nature 430: 190-195 structures as multicolor, high-efficiency light-emitting diodes. Nano Lett 5:-2287-2291 12216iwww.pnas.org/cgi/doi/10.1073/pnas.1108584108 Jiang et al
Synthesis of Si∕semiconductor and Si∕SiO2∕semiconductor branched NWs. Si or Si∕SiO2 NWs with deposited Au-NPs were dispersed on SiO2 surface of heavily Si substrates as above and then immediately placed into the appropriate NW gas phase growth system to prepare branched semiconductor NWs. Ge branches were grown at 290 °C, 200 torr for 15 min, with the flow of 10 sccm GeH4 (10%), 10 sccm PH3 (1,000 ppm in H2), and 200 sccm H2 as described previously (41). The growth of other III–V and II–VI branches was achieved by thermal evaporation and vapor transport method (42). Powders with the same composition were put into the center of the quartz tube, which was heated to 650–780 °C, while the branch growth temperature was approximately 400–600 °C. 30 sccm of H2 was used as the carrier gas, and pressure was kept at 40 torr. Device Fabrication and Measurement. Single- and multiple-branch input devices were fabricated on SiO2 surface of Si substrates (50-nm thermal oxide, n-type 0.005 Ω-cm, Nova Electronic Materials) using electron beam lithography (43) followed by thermal evaporation of metals. Ti∕Pd (5∕50 nm) contacts were used for both Si and Ge NWs; Ti∕Al∕Pd∕Au (20∕80∕20∕30 nm) contacts were used for other III–V and II–VI semiconductor NWs. Current– voltage (I–V) data were recorded using an Agilent semiconductor parameter analyzer (Model 4156C) with contacts to devices made using a probe station (Desert Cryogenics, Model TTP4). EL from branched NW structures was characterized with a homebuilt microluminescence instrument (44). Arrays of Si∕Au-NP NW devices were defined by photolithography (37). Ti∕Pd (5∕50 nm) metal contacts were deposited by thermal evaporation and then passivated by subsequent deposition of 50-nm thick Si3N4 coating (37). The completed device chip was subject to Au-branch growth as described above. The Au branches were modified in two steps. First, the devices were reacted with a 10 mg∕mL solution of DMSO (Sigma-Aldrich) for approximately 4 h, followed by extensive rinsing with DMSO. Anti-PSA (AbI, clone ER-PR8, NeoMarkers) was then coupled to the succinimidyl(NHS)-terminated Au branches surfaces by reaction of 10–20 μg∕mL antibody in a pH 8.4, 10 mM phosphate buffer solution for a period of 2–4 h. Unreacted NHS groups were subsequently passivated by reaction with ethanolamine under similar conditions. PSA and BSA protein samples in 1 μM phosphate buffer solution (pH, 7.4) were flowed under a flow rate of 0.30–0.60 mL∕h through the microfluidic channel while monitoring the branch nanowire device properties as described in detail elsewhere (37). Stress Field Simulation. Stress field simulations were carried out using finite element method (ABAQUS software, version, 6.5-1). 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