Operating Systems Chapter 5: Input/Output 5,1 Principles of l/o hardwareⅣO硬件原理 5,2 Principles of lo software 10软件原理 4 5.3 10 software layers IO软件层次 H 5.4 Disks 盘 H 5.5 Clocks 时钟 56 Character- oriented terminals面向字符的终端 57 Graphical user interfaces图形用户界面 a 5.8 Network terminals 网络终端 耳59 Power management 电源管理 Gao Haichang, Software School, Xidian University 3
Operating Systems Gao Haichang , Software School, Xidian University 3 Chapter 5: Input/Output 5.1 Principles of I/O hardware I/O硬件原理 5.2 Principles of I/O software I/O软件原理 5.3 I/O software layers I/O软件层次 5.4 Disks 盘 5.5 Clocks 时钟 5.6 Character-oriented terminals 面向字符的终端 5.7 Graphical user interfaces 图形用户界面 5.8 Network terminals 网络终端 5.9 Power management 电源管理
Operating Systems oS control /o device g Main functions: u Send commands to the devices E Catch interrupts H Handle errors Provide an interface between the devices and the rest of the system that IS simple and easy to use e Device independence Gao Haichang, Software School, Xidian University
Operating Systems Gao Haichang , Software School, Xidian University 4 OS control I/O device Main functions: Send commands to the devices Catch interrupts Handle errors Provide an interface between the devices and the rest of the system that is simple and easy to use Device independence
Operating Systems Principles of 1/0 Hardware e Block device u Stores information in fixed -size blocks. each one with its own address I The essential property of a block device is that it is possible to read or write each block independently of all the other ones H Disks g Character device Delivers or accepts a stream of characters, without regard to any block structure w It is not addressable and does not have any seek operation t Printers. network interfaces. mouse Other device A cloc k Gao Haichang, Software School, Xidian University
Operating Systems Gao Haichang , Software School, Xidian University 5 Principles of I/O Hardware Block device Stores information in fixed-size blocks, each one with its own address. The essential property of a block device is that it is possible to read or write each block independently of all the other ones. Disks Character device Delivers or accepts a stream of characters, without regard to any block structure. It is not addressable and does not have any seek operation. Printers, network interfaces, mouse Other device clock
Operating Systems Principles of 1/0 Hardware Device Data rate Some typical Keyboard I 10 bytes/sec M 100 bytes/sec device network 56K modem 7 KB/sec and data base Telephone channel 8 KB/sec Dual ISDN lines 16 KB/sec rates Laser printer 100 KB/sec Scanner 400 KB/sec Classic Ethernet 1.25 MB/sec USB(Universal Serial Bus) 1.5 MB/sec Digital camcorder 4 MB/sec IDE disk 5 MB/sec 40X CD-ROM 6 MB/sec Fast Ethernet 12.5 MB/sec ISA bus 16.7 MB/sec EIDE(ATA-2)disk 16.7 MB/sec FireWire(IEEE 1394)50 MB/sec XGA Monitor 60 MB/sec SONET OC-12 network 78 MB/sec SCSI Ultra 2 disk 80 MB/sec Gigabit Ethernet 125 MB/sec Ultrium tape 320 MB/sec PCI bus 528 MB/s sec Sun Gigaplane XB backplane 20 GB/sec ao Haichang, software school, xidian Universl
Operating Systems Gao Haichang , Software School, Xidian University 6 Principles of I/O Hardware Some typical device, network, and data base rates
Operating Systems Device controllers elo devices have components A mechanical component device E electronic component g The electronic component is the device controller E may be able to handle multiple devices g Controller's tasks w Convert the serial bit stream into a block of bytes H Perform any error correction necessary H Copy it to main memory Gao Haichang, Software School, Xidian University
Operating Systems Gao Haichang , Software School, Xidian University 7 Device Controllers I/O devices have components: mechanical component （device） electronic component The electronic component is the device controller may be able to handle multiple devices Controller's tasks Convert the serial bit stream into a block of bytes Perform any error correction necessary Copy it to main memory
Operating Systems Memory-Mapped 1/0 c Each controller has a few registers that are used for communication with cpu g Write into these registers os can command the device to deliver data accept data, switch itselfon or off, or otherwise perform some action G Read from these registers: OS can learn what the devices state is whether it is prepared to accept a new command, and so on c In addition to the control registers, many devices have a data buffer that the os can read and write(e.g video ram) c Q: How the CPU communicates with the control registers and the device data buffer? Gao Haichang, Software School, Xidian University
Operating Systems Gao Haichang , Software School, Xidian University 8 Memory-Mapped I/O Each controller has a few registers that are used for communication with CPU. Write into these registers: OS can command the device to deliver data, accept data, switch itself on or off, or otherwise perform some action. Read from these registers: OS can learn what the device’s state is, whether it is prepared to accept a new command, and so on. In addition to the control registers, many devices have a data buffer that the OS can read and write (e.g. video RAM). Q: How the CPU communicates with the control registers and the device data buffer?
Operating Systems Memory-Mapped 1/0(2) Two address One address space Two address spaces OxFFFF Memory 1O ports 0 (a) (a)Separate 1o and memory space(IBM360) w Each control register is assigned an lo port number H Address spaces for memory and 1/O are different (b)Memory-mapped l/o(PDP-11) w Map all the control registers into the memory space H Each control register is assigned a unique memory address to which no memory is assigned (c) Hybrid(Pentium) H Memory-mapped 1/O data buffers, separate IO ports for the control registers
Operating Systems Gao Haichang , Software School, Xidian University 9 Memory-Mapped I/O (2) (a) Separate I/O and memory space (IBM 360) Each control register is assigned an I/O port number. Address spaces for memory and I/O are different (b) Memory-mapped I/O (PDP-11) Map all the control registers into the memory space. Each control register is assigned a unique memory address to which no memory is assigned. (c) Hybrid (Pentium) Memory-mapped I/O data buffers , separate I/O ports for the control registers
Operating Systems Memory-Mapped 1/0 Advantages G With memory-mapped 1O, a lo device driver can be written entirely in C. Otherwise, some assembly code is needed No special protection mechanism is needed to keep user processes from performing 10. G Every instructions that can reference memory can also reference control registers. Gao Haichang, Software School, Xidian University 10
Operating Systems Gao Haichang , Software School, Xidian University 10 Memory-Mapped I/O Advantages With memory-mapped I/O, a I/O device driver can be written entirely in C. Otherwise, some assembly code is needed. No special protection mechanism is needed to keep user processes from performing I/O. Every instructions that can reference memory can also reference control registers
Operating Systems Memory-Mapped 1/0 Disadvantages e Most computers nowadays have some form of caching of memory words. Caching a device control register would be disastrous(blind to device ready) Selective disable caching adds extra complexity. G If there is only one address space then all memory modules and all lo devices must examine all memory references to see which ones to response to. Most modern computers have a dedicated high-speed memory bus, so O device have no way of seeing memory addresses as they go by on the memory bus. Gao Haichang, Software School, Xidian University
Operating Systems Gao Haichang , Software School, Xidian University 11 Memory-Mapped I/O Disadvantages Most computers nowadays have some form of caching of memory words. Caching a device control register would be disastrous (blind to device ready). Selective disable caching adds extra complexity. If there is only one address space, then all memory modules and all I/O devices must examine all memory references to see which ones to response to. Most modern computers have a dedicated high-speed memory bus, so I/O device have no way of seeing memory addresses as they go by on the memory bus
Operating Systems Memory-Mapped 1/0 Disadvantages CPU reads and writes of memory go over this high-bandwidth bus CPU Memory CPU Memory O All addresses( memory This memory port is to allow l/o devices and / o)go here Bu access to memory (a)a single-bus architecture (b )a dual-bus memory architecture Gao Haichang, Software School, Xidian University 12
Operating Systems Gao Haichang , Software School, Xidian University 12 Memory-Mapped I/O Disadvantages (a) A single-bus architecture (b) A dual-bus memory architecture