EDA技术实用教程 第9章 VHDL基本语句
第9章 VHDL基本语句 EDA技术实用教程
K述列 9.1顺序语句 911赋值语句 信号赋值语句 变量赋值语句 赋值目标(赋值号)(赋值源 912IF语句
KX 康芯科技 9.1 顺序语句 9.1.1 赋值语句 9.1.2 IF 语句 信号赋值语句 变量赋值语句 赋值目标 赋值符号 赋值源
K述列 9.1顺序语句 913CASE语句 CASE语句的结构如下: CASE表达式IS when选择值→>顺序语句; when选择值→>顺序语句; END CASE
KX 康芯科技 9.1.3 CASE语句 CASE语句的结构如下: CASE 表达式 IS When 选择值 => 顺序语句; When 选择值 => 顺序语句; ... END CASE ; 9.1 顺序语句
【例9-1】 LIBRARY IEEE USE IEEE STD LOGIC 1164.ALL ENTITY mux41 Is PORT(S4, S3, S2, SI: IN STD LOGIC; z4, z, Z2, zI: OUTSTD LOGIC); END mux41 arChitECtUrE activ of mux41 IS SIGNAL Sel INTEGER RANGEOTO 15 BEGIN PROCESS(Sel, s4, S3, S2, Sl) BEGIN sek<=0; 输入初始值 IF(sI=1) THEN sel < sel+l i 接下页
接下页 【例9-1】 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY mux41 IS PORT (s4,s3,s2,s1 : IN STD_LOGIC; z4,z3, z2,z1 : OUT STD_LOGIC); END mux41; ARCHITECTUREactiv OF mux41 IS SIGNAL sel : INTEGER RANGE 0 TO 15; BEGIN PROCESS (sel ,s4,s3,s2,s1 ) BEGIN sel<= 0 ; -- 输入初始值 IF (s1 ='1') THEN sel <= sel+1 ;
ELSIF(s2=1)THEN Sel 74<=1 当sel为8~15中任一值时选中 END CASE END PROCESS END activ
ELSIF (s2 ='1') THEN sel z1 z2 z3 z4<='1' ; -- 当sel为8~15中任一值时选中 END CASE ; END PROCESS; END activ;
【例9-3】 LIBRARY IEEE USE IEEE STD LOGIC 1164.ALL: USE IEEE STD LOGIC UNSIGNEDALL ENTITY alu Is PORT a, b: IN STD LOGIC VECTOR (7 DOWNTO0); opcode: IN STD LOGIC VECTOR(I DOWNTO0); result: OUT STD LOGIC VECTOR(7 DOWNTOO)) END alu: arChitECtURe behave of alu is CONSTANT plus STD LOGIC VECTOR (I DOWNTO0): =b00 CONSTANT minus STD LOGIC VECTOR (I DOWNTO0): b01; CONSTANTequal STD LOGIC VECTOR(I DOWNTO0: =b"10 CONSTANT not equal: STD LOGIC VECTOR (I DOWNTO0): =bl1"; 接下页
接下页 【例9-3】 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY alu IS PORT( a, b : IN STD_LOGIC_VECTOR(7 DOWNTO0); opcode:IN STD_LOGIC_VECTOR(1 DOWNTO0); result:OUT STD_LOGIC_VECTOR(7 DOWNTO0) ); END alu; ARCHITECTUREbehave OF alu IS CONSTANTplus : STD_LOGIC_VECTOR(1 DOWNTO0) := b"00"; CONSTANT minus : STD_LOGIC_VECTOR(1 DOWNTO0) := b"01"; CONSTANTequal : STD_LOGIC_VECTOR(1 DOWNTO0) := b"10"; CONSTANTnot_equal: STD_LOGIC_VECTOR (1 DOWNTO0) := b"11";
【例9-2】 SIGNAL value: INTEGER RANGE O TO 15; SIGNAL outl: STD LOGIC i CASE value Is 缺少以WHEN引导的条件句 END CASE CASE value is WHEN0=>outlout10ut1out1<=0 END CASE
【例9-2】 SIGNAL value : INTEGER RANGE 0 TO 15; SIGNAL out1 : STD_LOGIC ; ... CASE value IS -- 缺少以WHEN引导的条件句 END CASE; ... CASE value IS WHEN 0 => out1 out1 out1 out1<= '0'; END CASE;
BEGIN PROCESS (opcode, a, b) BEGIN CASE opcode is WhEN plus=> result result a、b相等 IF(a=b) THEn result <=x01"i ELSE result <=x00" END IF: WhEN not equal = 、b不相等 IF(a/ = b)then result <=x 0l ELSE result <=x00 END IF END CASE END PROCESS end behave
BEGIN PROCESS (opcode,a,b) BEGIN CASE opcode IS WHEN plus => result result -- a、b相等 IF (a = b) THEN result -- a、b不相等 IF (a /= b) THEN result <= x"01"; ELSE result <= x"00"; END IF; END CASE; END PROCESS; END behave;
K述列 9.1顺序语句 914LOOP语句 (1)单个LOOP语句,其语法格式如下: [工OoP标号:]工OoP 顺序语句 END LOOP[LOO标号; L2: LOOP a:=a+1; EXIT L2 WHEN a>10 当a大于10时跳出循环 END LOOP L2
KX 康芯科技 9.1.4 LOOP语句 (1) 单个LOOP语句,其语法格式如下: [ LOOP标号:] LOOP 顺序语句 END LOOP [ LOOP标号 ]; ... L2 : LOOP a := a+1; EXIT L2 WHEN a >10 ; -- 当a大于10时跳出循环 END LOOPL2; ... 9.1 顺序语句
K述列 9.1顺序语句 914LOOP语句 (2) FOR LOOP语句,语法格式如下: [LoOP标号:]FOR循环变量,IN循环次数范 围 LOOP 顺序语句 END LOOP LOOP标号];
KX 康芯科技 9.1.4 LOOP语句 (2) FOR_LOOP语句,语法格式如下: [LOOP标号:] FOR 循环变量,IN 循环次数范 围 LOOP 顺序语句 END LOOP [LOOP标号]; 9.1 顺序语句