® ARM体系结构 (Advanced RISC Machines) 李曦 llxx@ustc.edu.cn
ARM体系结构 (Advanced RISC Machines) 李曦 llxx@ustc.edu.cn
内容提要 ® ·嵌入式处理器概述 ·处理器体系结构 ·ARM处理器架构与编程模型 ·Cortex M处理器
内容提要 • 嵌入式处理器概述 • 处理器体系结构 • ARM处理器架构与编程模型 • Cortex M处理器
知识范踌 Application programs ·Computing“stack'” -Applications Operating system Programming language Compiler Hardware -Runtime Pre-1990s. -Virtual machine EE cs IS -Operating system HARDWARE SOFTWARE BUSINESS Hypervisor Post-1990s: -Architecture EE CE cs SE Microarchitecture HARDWARE SOFTWARE ORGANIZATIONAL NE口EDS
知识范畴 • Computing “stack” – Applications – Programming language – Compiler – Runtime – Virtual machine – Operating system – Hypervisor – Architecture – Microarchitecture
Typical Architecture for RTS USTC 嵌入式系统虽然复杂,但通用处理器的设计经验会有很大帮助 Peripheral Bus DEBUG Port Non-volatile memory Custom Devices ·EPROM,FLASH,DISK ·ASIC Hybrid ·FPGA Microprocessor ·PAL 4.8.16.32.4 bit bus ·CISc,RISC,DSP Standard Devices Integrated peripherals Volatile Memory ·Debug/Test Port 1/0 Ports ·DRAM,SRAM ·Caches Peripheral Controllers ·Pipeline Hybrid Multiprocessing Systems Communication Devices ·Ethemet .RS-232 ·scsl ·Centronics System Clocks Proprietary RTC circuitry Software ·System clocks ·Application Code Integrated in uC ·Driver Code/BIOS ·Imported/Exported Microprocessor Bus Real Time Operating System ·Custom User Interface ·PCI Communications Protocol Stacks ·VME .C.C++,Assembly Language ·P℃-102 ·Legacy Code llxx@ustc.edu.cn 4/87
Typical Architecture for RTS llxx@ustc.edu.cn 4/87
Microprocessor types by applications 。 General-purpose Microprocessor -Desktop applications:X86,PowerPC Server applications ·科学和工程计算:Power1,Power2:,Powers3,Power4 ·数据库和事务处理:RS64,RS64-l,RS64-川 o Embedded Microprocessor: -focused on particular application area Microprocessors:Media,Graphic,Network and Communication ·Microcontrollers Digital Signal Processors (DSP) ·System on Chips(soc) Of todays microprocessors -95%go into embedded applications -50%of revenue stems from embedded systems llxx@ustc.edu.cn 5/87
• General-purpose Microprocessor – Desktop applications: X86、PowerPC – Server applications • 科学和工程计算:Power1, Power2, Power3, Power4 • 数据库和事务处理:RS64, RS64-II, RS64-III • Embedded Microprocessor: – focused on particular application area Microprocessor types by applications llxx@ustc.edu.cn 5/87 – focused on particular application area • Microprocessors: Media, Graphic, Network and Communication • Microcontrollers • Digital Signal Processors(DSP) • System on Chips(SoC) • Of todays microprocessors – 95% go into embedded applications – 50% of revenue stems from embedded systems
嵌入式微处理器 Over60亿片in2003 9.000 8,000 7,000 6,000 5,000 4,000 3,000 2,000 1,000 0 1997199819992000200120022003200420052006 SH3/SH41% ☐4-Bit■8-Bit■16-Bit口32-bit+ x868% By SEMICO PowerPC 12% ARI7 15% MIPS 8% ARI9 45 ARH11 13写 Cortex-置0或3 10 Cortex-A8求Ag 6 其他 12% ARM 71% 0 5%10%15%20m25%30%35%40x345%50m 6/87
嵌入式微处理器 6/87
Microchip PIC单片机 初档8位单片机:P1C12C5XXX/16C5X系列 -最早在市场上得到发展,价格较低,有较完善的开发手段,在国内应用最广; -PIC12C5XX:世界第一个8引脚低价位单片机 ·512字节ROM、25字节RAM、一个8位定时器、一根输入线、5根I/O线 ·应用:摩托车点火器。售价36元/片。 一可用于简单的智能控制等一些对单片机体积要求较高的地方,前景十分广阔。 中档8位单片机:PIC12C6XX/PIC16CXXX系列 一近年来重点发展的系列产品,品种最为丰富。 ·增加了中断功能,指令周期达到200s,含A/D,内部E2PROM数据存储器,双时 钟工作,2C和SPI接口,异步串行通讯(UART),模拟电压比较器、LCD驱动等。 封装从8~68脚: 一可用于高、中、低档的电子产品设计。价格适中。 -PIC16C74:40引脚。含:4KROM、192字节RAM、8路AVD、3个8位定时器、 2个CCP模块、三个串行口、1个并行口、11个中断源、33个/O脚。 ·高档8位单片机:PIC17CXX系列P1C17CXX 一是适合高级复杂系统开发的系列产品,增加了硬件乘法器,指令周期可达成 160ns,性价比最高; 一可用于高、中档产品的开发,如马达控制、音调合成。 llxx@ustc.edu.cn 7/87
Microchip PIC单片机 • 初档8位单片机:PIC12C5XXX/16C5X系列 – 最早在市场上得到发展,价格较低,有较完善的开发手段,在国内应用最广; – PIC12C5XX:世界第一个8引脚低价位单片机 • 512字节ROM、25字节RAM、一个8位定时器、一根输入线、5根I/O线 • 应用:摩托车点火器。 售价3~6元/片。 – 可用于简单的智能控制等一些对单片机体积要求较高的地方,前景十分广阔。 • 中档8位单片机:PIC12C6XX/PIC16CXXX系列 – 近年来重点发展的系列产品,品种最为丰富。 llxx@ustc.edu.cn 7/87 – 近年来重点发展的系列产品,品种最为丰富。 • 增加了中断功能,指令周期达到200ns,含A/D,内部E2PROM数据存储器,双时 钟工作,I2C和SPI接口,异步串行通讯(UART),模拟电压比较器、LCD驱动等。 封装从8~68脚; – 可用于高、中、低档的电子产品设计。价格适中。 – PIC16C74:40引脚。含: 4K ROM、192字节RAM、8路A/D、3个8位定时器、 2个CCP模块、三个串行口、1个并行口、11个中断源、33个I/O脚。 • 高档8位单片机:PIC17CXX系列PIC17CXX – 是适合高级复杂系统开发的系列产品,增加了硬件乘法器,指令周期可达成 160ns,性价比最高; – 可用于高、中档产品的开发,如马达控制、音调合成
Stanford STARMAC Project Low Level Carbon Fiber Control Processor Tubing Robostix Fiberglass High Level Honeycomb Control Processor Plastic Tube Stargate SBC Straps or PC/104 GPS Superstar ll Sonic Ranger Brushless DC Motors SRF08 Axi2208/26 Inertial Measurement Unit (IMU) Electronic Speed 3DMG-X1 Battery Controller Lithium Phoenix 25 LIDAR Stereo Vision Polymer Hokuyo Videre Systems URG-04LX Small Vision System
Stanford STARMAC Project
四旋翼飞控:STARMAC architecture LIDAR RS232 URG-04LX 115 kbps 10 Hz ranges PC/104 WiFi Pentium M USB 2 Stereo Cam 802.11g+ Firewire 1GB RAM,1.8GHz 480 Mbps s 54 Mbps Videre STOC RS232 Est.control 30fps320x240 480 Mbps 年中年年年年年年年 年年年年年年车金年年年年年年年年年出年年。。。年年年年年年 GPS UART Superstar Il 19.2 kbps Stargate 1.0 WiFi 10H2 Intel PXA255 CF UART 64MB RAM.400MHz 802.11b 100 Mbps S5 Mbps IMU 115 Kbps UART Supervisor,GPS 3DMG-X1 UART Robostix 76 or 100 Hz 115 kbps Atmega128 Low level control Ranger PPM SRF08 400 kbps 100Hz 13 Hz Altitude Analog Ranger Beacon Mini-AE ESC Motors Timing/ Tracker/DTS 10-50 Hz Altitude Analog Phoenix-25.Axi 2208/26 1 Hz
四旋翼飞控:STARMAC architecture
嵌入式处理器的特征 USTC General rules (with exceptions): 1.Designed for efficiency (vs.ease of programming) 2.Huge variety of processors(resulting from 1.) 3.Harvard architecture 4.Heterogeneous register sets 5.Limited instruction-level parallelism or VLIW ISA 6.Different operation modes (saturating arithmetic,fixed point) 7.Specialised microcontroller DSP instructions (bit- reversal,multiply/accumulate,bit-field addressing,modulo addressing) 8.Multiple memory banks 9.No "fat"(MMU,caches,memory protection,target buffers, complex pipeline logic,... These features have to be known to the compiler! llxx@ustc.edu.cn 10/87
嵌入式处理器的特征 • General rules (with exceptions): 1. Designed for efficiency (vs. ease of programming) 2. Huge variety of processors (resulting from 1.) 3. Harvard architecture 4. Heterogeneous register sets 5. Limited instruction-level parallelism or VLIW ISA 6. Different operation modes (saturating arithmetic, fixed point) llxx@ustc.edu.cn 10/87 7. Specialised microcontroller & DSP instructions (bitreversal, multiply/accumulate, bit-field addressing, modulo addressing) 8. Multiple memory banks 9. No “fat” (MMU, caches, memory protection, target buffers, complex pipeline logic, ...) • These features have to be known to the compiler!