National semiconductor June 1989 DM54LS75/DM74LS75 Quad Latches General Description as present at the data input at the N ge for bin ar informat on between processing units and ata time the trans tiom ture d is retained at the Q output un A ture complementary O and O outputs e high, and the Q output will follow the data input as long as from a 4-bit latch, and are available in 16pin packages. the enable remains high. When the enable goes low, Connection Diagram Function Table(Each Latch) Enable H- High Level, L -Low Level. x-Don't Care Op- The Level of a Before the High-to-Low Transition of ENABLE Order Number DM54LS75J. DM54LS7 DM7ALS75M See Ns Package Number J16A, M16A, N16A or W16A Logic Diagram(Each Latch) TLFA8374-2
TL/F/6374 DM54LS75/DM74LS75 Quad Latches June 1989 DM54LS75/DM74LS75 Quad Latches General Description These latches are ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable is high, and the Q output will follow the data input as long as the enable remains high. When the enable goes low, the information (that was present at the data input at the time the transition occured) is retained at the Q output until the enable is permitted to go high. These latches feature complementary Q and Q outputs from a 4-bit latch, and are available in 16-pin packages. Connection Diagram Dual-In-Line Package TL/F/6374 –1 Order Number DM54LS75J, DM54LS75W, DM74LS75M or DM74LS75N See NS Package Number J16A, M16A, N16A or W16A Function Table (Each Latch) Inputs Outputs D Enable Q Q L H LH H H HL XLQ0 Q0 H e High Level, L e Low Level, X e Don’t Care Q0 e The Level of Q Before the High-to-Low Transition of ENABLE Logic Diagram (Each Latch) TL/F/6374 –2 C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A
Absolute Maximum Ratings (Note) ntact the National Semiconductor sal Office/Distributors for availability and specifications. Supply Voltage The"Recommended Operating Conditions"table will define Operating Free Air Temperature Range -55cto+125° the conditions for actual device operation. o-C to+70°c Storage Temperature Range -65°to+150° Recommended Operating Conditions 54Ls75 DM7ALS75 Parameter 475 525 07 h level o -04mA ow Level Output Current Enable Pulse Width( Note 4) Setup Time(Note 4) Free Air Operating Temperature -55 125 Electrical Characteristics over recommended operating free air temperature range(unless otherwise noted) Parameter Min(Note 1) Units nput Clamp voltage VOH Vcc= Min, IoH Max DM54 VIL= Max, VIH= Min DM74 5 loL Ma DM54 loL 4 mA, urrent@ Max Vcc=Max,V=7V 0 Vcc= Max, VI=2.7V Ena 80 Voc= Max, VI=0.4V 0.4 los Voc= Max DM54-20 100 Output Current mA ( Note 2) Vcc= Max(Note 3) mA Note 1: Al typicals are at Vcc- 5v, TA-25"C Note 2 than one output should be shorted at a time, and the duration should not exceed one second. Note 3: icc is measured with al outputs open and all inputs grounded. 2
Absolute Maximum Ratings (Note) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage 7V Operating Free Air Temperature Range DM54LS b55§C to a125§C DM74LS 0§C to a70§C Storage Temperature Range b65§C to a150§C Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation. Recommended Operating Conditions Symbol Parameter DM54LS75 DM74LS75 Units Min Nom Max Min Nom Max VCC Supply Voltage 4.5 5 5.5 4.75 5 5.25 V VIH High Level Input Voltage 2 2 V VIL Low Level Input Voltage 0.7 0.8 V IOH High Level Output Current b0.4 b0.4 mA IOL Low Level Output Current 4 8 mA tW Enable Pulse Width (Note 4) 20 20 ns tSU Setup Time (Note 4) 20 20 ns tH Hold Time (Note 4) 0 0 ns TA Free Air Operating Temperature b55 125 0 70 §C Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units (Note 1) VI Input Clamp Voltage VCC e Min, II e b18 mA b1.5 V VOH High Level Output VCC e Min, IOH e Max DM54 2.5 3.5 V Voltage VIL e Max, VIH e Min DM74 2.7 3.5 VOL Low Level Output VCC e Min, IOL e Max DM54 0.25 0.4 Voltage VIL e Max, VIH e Min DM74 0.35 0.5 V IOL e 4 mA, VCC e Min DM74 0.25 0.4 II Input Current @ Max VCC e Max, VI e 7V D 0.1 mA Input Voltage Enable 0.4 IIH High Level Input VCC e Max, VI e 2.7V D 20 mA Current Enable 80 IIL Low Level Input VCC e Max, VI e 0.4V D b0.4 mA Current Enable b1.6 IOS Short Circuit VCC e Max DM54 b20 b100 mA Output Current (Note 2) DM74 b20 b100 ICC Supply Current VCC e Max (Note 3) 6.3 12 mA Note 1: All typicals are at VCC e 5V, TA e 25§C. Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 3: ICC is measured with all outputs open and all inputs grounded. Note 4: TA e 25§C and VCC e 5V. 2
Switching Characteristics at Vcc=5V and Ta =25 C(See Section 1 for Test Waveforms and Output Load) Symbol Parameter CL 15 pF CL-50 pF Units w to High Level Output 30 ns tPHL 2 High to Low Level Output LH 25 to High Level Output ns Propagation Delay Time 20 30 tPHL Propagation Delay Time Low to High Level Output tPHL Propagation Delay Time Enable to 2
Switching Characteristics at VCC e 5V and TA e 25§C (See Section 1 for Test Waveforms and Output Load) From (Input) RL e 2 kX Symbol Parameter To (Output) CL e 15 pF CL e 50 pF Units Min Max Min Max tPLH Propagation Delay Time D to 27 30 ns Low to High Level Output Q tPHL Propagation Delay Time D to 17 25 ns High to Low Level Output Q tPLH Propagation Delay Time D to 20 25 ns Low to High Level Output Q tPHL Propagation Delay Time D to 15 20 ns High to Low Level Output Q tPLH Propagation Delay Time Enable to 27 30 ns Low to High Level Output Q tPHL Propagation Delay Time Enable to 25 30 ns High to Low Level Output Q tPLH Propagation Delay Time Enable to 30 30 ns Low to High Level Output Q tPHL Propagation Delay Time Enable to 15 20 ns High to Low Level Output Q 3
Physical Dimensions inches(millimeters) 055士0.0 GLASS SEALANT :3 83±9g 77-10,41 J154(REV L 16-Lead Ceramic Dual-In-Line Package(J) er Number DM54LS75J s Package Number J16A
Physical Dimensions inches (millimeters) 16-Lead Ceramic Dual-In-Line Package (J) Order Number DM54LS75J NS Package Number J16A 4
Physical Dimensions inches(millimeters)(Continued) 73 245 16-Lead Small l e Number M16A 02 m PIN NO. 1 IDENT |3m m iasB3-5080 16-Lead Molded dual-In-Line pac Order Number DM74LS75N NS Package Number N16A
Physical Dimensions inches (millimeters) (Continued) 16-Lead Small Outline Molded Package (M) Order Number DM74LS75M NS Package Number M16A 16-Lead Molded Dual-In-Line Package (N) Order Number DM74LS75N NS Package Number N16A 5
Physical Dimension 120 0.07-0018 0102=0152 <0. O0O MIN TYP PIN NO. 1 Order Number DM54LS75W NS Package Number W16A ATIONAL'S PRODUCTS AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT VICES OR SYSTEMS THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein Life support devices or systems are devices or 2. A critical component is any co of a life systems which, (a) are intended for surgical implant e reasonably expected to cause support device or system, or to vith instructions for use provided in the labeling, can effectiveness. be reasonably ex to result in a significant inju F5350 Natonal does not assume any sporeiN for use of any cicu try dcbad, no drmu patent lenses a mpod and National resorts tho at any io witout nonce o chango said cory and spoo cations
DM54LS75/DM74LS75 Quad Latches Physical Dimensions inches (millimeters) (Continued) 16-Lead Ceramic Flat Package (W) Order Number DM54LS75W NS Package Number W16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd. 1111 West Bardin Road Fax: ( a49) 0-180-530 85 86 13th Floor, Straight Block, Tel: 81-043-299-2309 Arlington, TX 76017 Email: cnjwge @tevm2.nsc.com Ocean Centre, 5 Canton Rd. Fax: 81-043-299-2408 Tel: 1(800) 272-9959 Deutsch Tel: ( a49) 0-180-530 85 85 Tsimshatsui, Kowloon Fax: 1(800) 737-7018 English Tel: ( a49) 0-180-532 78 32 Hong Kong Fran 3ais Tel: ( a49) 0-180-532 93 58 Tel: (852) 2737-1600 Italiano Tel: ( a49) 0-180-534 16 80 Fax: (852) 2736-9960 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications
