Recall: Combinatorial Logic Combinatorial Logic if Outputs at a specified time are a function only of the inputs at that time e.g. decoders, multiplexers and adders LPM DIRECTION= LPM PIPELINE LPM REPRESENTATION ONE INPUT IS CONSTANT= LPM ADD SUB Output change bataan instantly when resul uTPUT result[3. 0] input change b30
Recall: Combinatorial Logic • Combinatorial Logic if • Outputs at a specified time are a function only of the inputs at that time • e.g. decoders, multiplexers and adders Output change instantly when input change
方法一:布尔表达式 LBRARY EER USE IEEE STD LOG1C 1164.ALLY ENTITY ands PORT (a, b, C: IN STD_LOGIC; y OUT STD_LOGICE END and3- ARCHITECTURE and3 1 OF and3 s BEGIN y <=a AND b AND c) END and3_1
方法一:布尔表达式 LIBRARY IEEE; USE IEEE.STD_LOG1C_1164.ALL; ENTITY and3 IS PORT (a, b, c : IN STD_LOGIC; y : OUT STD_LOGIC); END and3; ARCHITECTURE and3_1 OF and3 IS BEGIN y <= (a AND b AND c) ; END and3_1;
方法二:逻辑真值描述 LBRARY=日 USE IEEE STD_LOGIC_-1164ALLi ENTITY and3 S PORT (a, b, C: IN STD_LOGIC; y OUT STD_LOGIC); END and35 ARCHTECTURE and32 OF ands BEGIN t4: PROCESS (a, b, c) VARIABLE comb:STD_LOGIC_VECTOR(2 DOWNTO O)B BEGIN combe=a &b
方法二:逻辑真值描述 LIBRARY IEEE; USE IEEE STD_LOGIC_1164.ALL; ENTITY and3 IS PORT (a,b,c : IN STD_LOGIC; y : OUT STD_LOGIC); END and3; ARCHITECTURE and3_2 OF and3 IS BEGIN t4: PROCESS (a,b,c) VARIABLE comb:STD_LOGIC_VECTOR(2 DOWNTO 0); BEGIN comb := a & b & c;