ON MT9M001:1/2-Inch Megapixel Digital Image Sensor Features 1/2-Inch Megapixel CMOS Digital Image Sensor MT9M001C12STM(Monochrome)Datasheet,Rev.M For the latest datasheet.please visit www.onsemi.com Features Table 1: Key Performance Parameters Parameter Value .Array Format (5:4):1,280H x 1,024V (1,310,720 active pixels).Total (incl.dark pixels):1,312H x 1,048V Optical format 1/2-inch5:4 Active imager size (1,374,976 pixels) 6.66mmHx5.32mm() Active pixels 1280H×1.024V Frame Rate:30 fps progressive scan;programmable Pixel size 5.2m5.2nm C☆w尚 e to any smaller Shutter type Electronic rolling shutter (ERS) etc.) Maximum data rate/ 48 MPS/48 MHz Controls:Gain,frame rate,frame size master clock 0x102 ps progressive scan; Applications res x-sec namic range 682dB .PCcameras SNR A5 AR MAX Supply voltage General Description Power consumption The ON Semiconductor MT9M001 is an SXGA-for ating temperature 0°Cto+70℃ with a 1/2-inch CMOS active-pixel digital image sen Packaging 48-pin CLCC sor.The active imaging pixel array of 1,280Hx 1,024V.It The sensor can be operated in its default mode or p incorporates sophisticated camera functions on-chip grammed by the user for frame size osure,gain set such as windowing,column and row skip mode,and ting,and other parameters.The default mode outputs snapshot mode.It is programmable through a simple an sxGa-size image at 30 frames per second (fos).An two-wire serial interface. on-chip analog-to-digital converter (ADC)provides 10 s ON Semi bits per pixel.FRAME_VALID and LINE_VALID signals technology that achieves CCD image quaiy(based on are output on dedicated pins,along with a pixel clock that is synchronous with valid data. signal-to-noise ratio and low-light sensitivity)while maintaining the inherent size,cost,and integration advantages of CMOS. MT3Meos转PRt.5sh5E到
MT9M001: 1/2-Inch Megapixel Digital Image Sensor Features MT9M001_DS Rev. M Pub. 5/15 EN 1 ©Semiconductor Components Industries, LLC , 1/2-Inch Megapixel CMOS Digital Image Sensor MT9M001C12STM (Monochrome) Datasheet, Rev. M For the latest datasheet, please visit www.onsemi.com Features • Array Format (5:4): 1,280H x 1,024V (1,310,720 active pixels). Total (incl. dark pixels): 1,312H x 1,048V (1,374,976 pixels) • Frame Rate: 30 fps progressive scan; programmable • Shutter: Electronic Rolling Shutter (ERS) • Window Size: SXGA; programmable to any smaller format (VGA, QVGA, CIF, QCIF, etc.) • Programmable Controls: Gain, frame rate, frame size Applications • Digital still cameras • Digital video cameras • PC cameras General Description The ON Semiconductor MT9M001 is an SXGA-format with a 1/2-inch CMOS active-pixel digital image sensor. The active imaging pixel array of 1,280H x 1,024V. It incorporates sophisticated camera functions on-chip such as windowing, column and row skip mode, and snapshot mode. It is programmable through a simple two-wire serial interface. This megapixel CMOS image sensor features ON Semiconductor’s breakthrough low-noise CMOS imaging technology that achieves CCD image quality (based on signal-to-noise ratio and low-light sensitivity) while maintaining the inherent size, cost, and integration advantages of CMOS. Table 1: Key Performance Parameters The sensor can be operated in its default mode or programmed by the user for frame size, exposure, gain setting, and other parameters. The default mode outputs an SXGA-size image at 30 frames per second (fps). An on-chip analog-to-digital converter (ADC) provides 10 bits per pixel. FRAME_VALID and LINE_VALID signals are output on dedicated pins, along with a pixel clock that is synchronous with valid data. Parameter Value Optical format 1/2-inch (5:4) Active imager size 6.66 mm (H) x 5.32 mm (V) Active pixels 1,280 H x 1,024 V Pixel size 5.2 m x 5.2 m Shutter type Electronic rolling shutter (ERS) Maximum data rate/ master clock 48 MPS/48 MHz Frame rate SXGA (1280 x 1024) 30 fps progressive scan; programmable ADC resolution 10-bit, on-chip Responsivity 2.1 V/lux-sec Dynamic range 68.2 dB SNRMAX 45 dB Supply voltage 3.0 V3.6 V, 3.3 V nominal Power consumption 363 mW at 3.3 V (operating); 294 W (standby) Operating temperature 0°C to +70°C Packaging 48-pin CLCC
d MT9M001:1/2-Inch Megapixel Digital Image Sensor Ordering Information Ordering Information Table2: Available Part Numbers Part Number Product Description Orderable Product Attribute Description MT9M001C12STM-DP Dry Pack with Protectiveim M M001C123 p1 Dry F SIM OR: P1/2C Dry Pack Single Tray without Protective Film 1 MP 1/2 CI Tape&Reel with Protective Fi MT9M001C12STM-TR 1 MP 1/2"CIS Tape&Reel without Protective Film MT9M001D00STMC84AC1-200 1 MP 1/2"CIS Die Sales,200um Thickness MM1 5/S EN
MT9M001_DS Rev. M Pub. 5/15 EN 2 ©Semiconductor Components Industries, LLC,2015. MT9M001: 1/2-Inch Megapixel Digital Image Sensor Ordering Information Ordering Information Table 2: Available Part Numbers Part Number Product Description Orderable Product Attribute Description MT9M001C12STM-DP 1 MP 1/2" CIS Dry Pack with Protective Film MT9M001C12STM-DR 1 MP 1/2" CIS Dry Pack without Protective Film MT9M001C12STM-DR1 1 MP 1/2" CIS Dry Pack Single Tray without Protective Film MT9M001C12STM-TP 1 MP 1/2" CIS Tape & Reel with Protective Film MT9M001C12STM-TR 1 MP 1/2" CIS Tape & Reel without Protective Film MT9M001D00STMC84AC1-200 1 MP 1/2" CIS Die Sales, 200m Thickness
O⑧ MT9M001:1/2-Inch Megapixel Digital Ima Table of Contents 8latons 04.44.4.。0.1 Orderin 2 General Description. .6 Pixel Data Format 9 face s Feature Deso ntion mple Write and Read Sequences. 16 Electrical Specifications. Revision HistorV.28
MT9M001_DS Rev. M Pub. 5/15 EN 3 ©Semiconductor Components Industries, LLC,2015. MT9M001: 1/2-Inch Megapixel Digital Image Sensor Table of Contents Table of Contents Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Pixel Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Serial Bus Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Two-Wire Serial Interface Sample Write and Read Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Feature Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Electrical Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
owsataoON MT9M001:1/2-Inch Megapixel Digital Image Sensor List of Figures List of Figures LCC Package Pinout Diagram op Right cor Figure 5 Spatial Iustration of mage e Readout 10 Figure 6 Timing Di ie00284 02A ue o nal path 6 dout in Normal and C mn Mirror O utput Mode. . t of Fight pix in No nal and Column Skip output Mode. 8 Figure Black L el Calibration Flow C Figure 16: 20 Timing biagram Figure 19: Ser ost nterfa ning 23 ce m for 23 Figure edge Signa er an Bi Quantum efficienc Monochrome rom the enter Ofset。· Figure 27: n CLCC Package Outline Drawing M hS EN
MT9M001_DS Rev. M Pub. 5/15 EN 4 ©Semiconductor Components Industries, LLC,2015. MT9M001: 1/2-Inch Megapixel Digital Image Sensor List of Figures List of Figures Figure 1: 48-Pin CLCC Package Pinout Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Figure 2: Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Figure 3: Pixel Array Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Figure 4: Pixel Pattern Detail (Top Right Corner) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Figure 5: Spatial Illustration of Image Readout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Figure 6: Timing Example of Pixel Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Figure 7: Row Timing and FRAME_VALID/LINE_VALID Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Figure 8: Timing Diagram Showing a Write to Reg0x09 with the Value 0x0284 . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Figure 9: Timing Diagram Showing a Read from Reg0x09; Returned Value 0x0284 . . . . . . . . . . . . . . . . . . . . . . .15 Figure 10: Signal Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Figure 11: Readout of Six Columns in Normal and Column Mirror Output Mode . . . . . . . . . . . . . . . . . . . . . . . . .17 Figure 12: Readout of Six Rows in Normal and Row Mirror Output Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Figure 13: Readout of Eight Pixels in Normal and Column Skip Output Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Figure 14: Black Level Calibration Flow Chart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 Figure 15: General Timing for Snapshot Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Figure 16: Different LINE_VALID Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Figure 17: Data Output Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Figure 18: Serial Host Interface Start Condition Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Figure 19: Serial Host Interface Stop Condition Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Figure 20: Serial Host Interface Data Timing for Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Figure 21: Serial Host Interface Data Timing for Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Figure 22: Acknowledge Signal Timing After an 8-Bit Write to the Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Figure 23: Acknowledge Signal Timing After an 8-Bit Read from the Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Figure 24: Quantum Efficiency—Monochrome . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Figure 25: Image Center Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Figure 26: Optical Orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 Figure 27: 48-pin CLCC Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
ON MT9M001:1/2-Inch Megapixel Digital List of Tables Pin pes Table4: Frame Timing .12 Table 5 Frame Time Long Integration Time ngs at 48 MH 12 C EI Table 8: AC Electrical Characteristics 22 Table 9 Absolute Maximum Ratings. .22 Table 10: Optical Area Dimensions.26
MT9M001_DS Rev. M Pub. 5/15 EN 5 ©Semiconductor Components Industries, LLC,2015. MT9M001: 1/2-Inch Megapixel Digital Image Sensor List of Tables List of Tables Table 1: Key Performance Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Table 2: Available Part Numbers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 Table 3: Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Table 4: Frame Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Table 5: Frame Time—Long Integration Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Table 6: Recommended Gain Settings at 48 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Table 7: DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Table 8: AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Table 9: Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Table 10: Optical Area Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
wsasastoO MT9Mo1:1/21nchMegapdD2iagm8eSto General Description Figure 1: 48-Pin CLCC Package Pinout Diagram STANDBY TRIGGERC FRAME VALD ▣LNE_VALID RESET# 9▣STROBE DGND DoUr ▣D0UT DOUT DOUT AGND M hS EN 6
MT9M001_DS Rev. M Pub. 5/15 EN 6 ©Semiconductor Components Industries, LLC,2015. MT9M001: 1/2-Inch Megapixel Digital Image Sensor General Description General Description Figure 1: 48-Pin CLCC Package Pinout Diagram 6 48 47 46 45 5 4 3 2 1 44 43 19 20 21 22 23 24 25 26 27 28 29 30 7 8 9 10 11 12 13 14 15 16 17 18 42 41 40 39 38 37 36 35 34 33 32 31 STANDBY TRIGGER NC RESET# NC NC OE# NC AGND VAA AGND AGND NC FRAME_VALID LINE_VALID STROBE DGND VDD DOUT DOUT DOUT DOUT DOUT PIXCLK NC VAA AGND VDD DGND DOUT DOUT DOUT DOUT DOUT CLKIN NC NC DGND VDD NC NC VAAPIX AGND AGND SCLK SDATA NC DGND
ON MT9M001:1/2-Inch Megapixel Digital Ima 3ea8pt Figure 2: Block Diagram Control Register r (APS) ,280X1024y Timing and Control Analog Processing AD 10-bit Data
MT9M001_DS Rev. M Pub. 5/15 EN 7 ©Semiconductor Components Industries, LLC,2015. MT9M001: 1/2-Inch Megapixel Digital Image Sensor General Description Figure 2: Block Diagram Clock Two-wire serial Input/Output 10-bit Data Sync Signals Control Register Analog Processing Active-Pixel Sensor (APS) Array SXGA 1,280H x 1,024V Timing and Control ADC
O① MT9Mo1:1/21nchMegapdD2iagm8eSto Table3: Pin Descriptions Pin Numbers Symbol Type Description 29 CLKIN Input Clock in.Master clock into sensor(48 MHz maximum). 13 OE# Input 10 RESET# Input Reset.Activates (LW)asynchronous reset of sensor.All registers assume 6 Input clockClock for serial interface. STANDBY Input EtndpytRtgmGWsandboymodedablesanaogbiasccutyfor TRIGGER rigger.Activates(HIGH)snapshot sequence. 45 SDATA tput adata.Serial data bus res 1.5KQ istor to 3.3V fo ull-up 24-28,32-36 ata out D R) 0T9 (MS FRAME VALID data outp during fran me ofv d pix LINE _VAUD Output aeRagdoigr5pmsdHGHdunglimeofseectabievaidpweldhta PIXCLK Output 39 STROBE Output Strobe.Output is pulsed HIGH to indicate sensor reset operation of pixel array has completed. 517247 AGND Supply Anaog ground.Provide isolated ground for ana block and pixel array. 5,23,38,43 Supp igital ground.Provide isolatedground for digital block. 16,20 ock,3.3V+0.3V. VAAPIX Supp吵 nalog pixel power powe upply for 3.3V0.3V3.3 4,22,37 Supply Digital power.Provide power supply for digital block3.3V3V. No connect.These pins must be left unconnected. M hS EN
MT9M001_DS Rev. M Pub. 5/15 EN 8 ©Semiconductor Components Industries, LLC,2015. MT9M001: 1/2-Inch Megapixel Digital Image Sensor General Description Table 3: Pin Descriptions Pin Numbers Symbol Type Description 29 CLKIN Input Clock in. Master clock into sensor (48 MHz maximum). 13 OE# Input Output enable. OE# when HIGH places outputs DOUT, FRAME_VALID, LINE_VALID, PIXCLK, and STROBE into a tri-state configuration. 10 RESET# Input Reset. Activates (LOW) asynchronous reset of sensor. All registers assume factory defaults. 46 SCLK Input Serial clock. Clock for serial interface. 7 STANDBY Input Standby. Activates (HIGH) standby mode, disables analog bias circuitry for power saving mode. 8 TRIGGER Input Trigger. Activates (HIGH) snapshot sequence. 45 SDATA Input/Output Serial data. Serial data bus, requires 1.5K resistor to 3.3V for pull-up. 24–28, 32–36 DOUT Output Data out. Pixel data output bits 0:9, DOUT (MSB), DOUT (LSB). 41 FRAME_VALID Output Frame valid. Output is pulsed HIGH during frame of valid pixel data. 40 LINE_VALID Output Line valid. Output is pulsed HIGH during line of selectable valid pixel data (see Reg0x20 for options). 31 PIXCLK Output Pixel clock. Pixel data outputs are valid during falling edge of this clock. Frequency = (master clock). 39 STROBE Output Strobe. Output is pulsed HIGH to indicate sensor reset operation of pixel array has completed. 15,17,18,21, 47, 48 AGND Supply Analog ground. Provide isolated ground for analog block and pixel array. 5, 23, 38, 43 DGND Supply Digital ground. Provide isolated ground for digital block. 16, 20 VAA Supply Analog power. Provide power supply for analog block, 3.3V ±0.3V. 1 VAAPIX Supply Analog pixel power. Provide power supply for pixel array, 3.3V ±0.3V (3.3V). 4, 22, 37 VDD Supply Digital power. Provide power supply for digital block, 3.3V ±0.3V. 2, 3 ,6, 9, 11, 12,14, 19, 30, 42, 44 NC — No connect. These pins must be left unconnected
ON MT9M001:1/2-Inch Megapixel Digital Im Pixel Data Format Pixel Array Structure and the f pixels are also optically black.The black row data is used internally for the automatic black level adjustment.However,the black rows can also be read out by setting the sensor to raw .280x 1024)image oundary around Figure 3: Pixel Array Description 8 black rov 6 bla 31,1047 olack row Figure 4: Pixel Pattern Detail(Top Right Corner) column readout direction black pixels Pixel (8,16) ee eoee eo ee eoee oe oo oe oooeoooe row lee eoeeeo ee eo oe oo oe oo oe oo eo ee eo ee eo oe oooe Note: 8=8a.cltmorow
MT9M001_DS Rev. M Pub. 5/15 EN 9 ©Semiconductor Components Industries, LLC,2015. MT9M001: 1/2-Inch Megapixel Digital Image Sensor Pixel Data Format Pixel Data Format Pixel Array Structure The MT9M001 pixel array is configured as 1,312 columns by 1,048 rows (shown in Figure 3). The first 16 columns and the first eight rows of pixels are optically black, and can be used to monitor the black level. The last seven columns and the last seven rows of pixels are also optically black. The black row data is used internally for the automatic black level adjustment. However, the black rows can also be read out by setting the sensor to raw data output mode (Reg0x20, bit 11 = 1). There are 1,289 columns by 1,033 rows of optically active pixels, which provides a four-pixel boundary around the SXGA (1,280 x 1,024) image. Figure 3: Pixel Array Description Figure 4: Pixel Pattern Detail (Top Right Corner) Note: e = even column or row 0 = odd column or row (1311, 1047) 16 black columns 7 black rows 8 black rows (0, 0) 7 black columns SXGA (1,280 x 1,024) + 4 pixel boundary + additional active column + additional active row = 1,289 x 1,033 active pixels Pixel (8, 16) black pixels column readout direction . . . . row readout direction ee oe ee oe ee oe eo oo eo oo eo oo ee oe ee oe ee oe eo oo eo oo eo oo ee oe ee oe ee oe eo oo eo oo eo oo ee oe ee oe ee oe
MT9M001:1/2-Inch Megapixel Digital Ima Output Data Format amount of horizontal blanking and vertical blanking is p rogrammable through Reg0x05 and RegOx06,respectively.LINE_VALID is HIGH during the shaded region of the figure. FRAME_VALID timing is described in"Output Data Timing"on page 10. Figure 5:Spatial lllustration of Image Readout VALID MAGE LANDIA 88888 VERTICAL BLANKING 60a88=898868 Output Data Timing UNVADece Figure 6:Timing Example of Pixel Data UNE_VALD- 几U几U八U八ni inallu timed the falling edge of PIXCLK.The PIXCLK is HIGH while master clock is HIGH and then M hS EN 6
MT9M001_DS Rev. M Pub. 5/15 EN 10 ©Semiconductor Components Industries, LLC,2015. MT9M001: 1/2-Inch Megapixel Digital Image Sensor Pixel Data Format Output Data Format The MT9M001 image data is read out in a progressive scan. Valid image data is surrounded by horizontal blanking and vertical blanking, as shown in Figure 5. The amount of horizontal blanking and vertical blanking is programmable through Reg0x05 and Reg0x06, respectively. LINE_VALID is HIGH during the shaded region of the figure. FRAME_VALID timing is described in “Output Data Timing” on page 10. Figure 5: Spatial Illustration of Image Readout Output Data Timing The data output of the MT9M001 is synchronized with the PIXCLK output. When LINE_VALID is HIGH, one 10-bit pixel datum is output every PIXCLK period. Figure 6: Timing Example of Pixel Data The rising edges of the PIXCLK signal are nominally timed to occur on the rising DOUT edges. This allows PIXCLK to be used as a clock to latch the data. DOUT data is valid on the falling edge of PIXCLK. The PIXCLK is HIGH while master clock is HIGH and then LOW while master clock is LOW. It is continuously enabled, even during the blanking period. The parameters P1, A, P2, and Q in Figure 7 are defined in Table 4. P0,0 P0,1 P0,2.P0,n-1 P0,n P1,0 P1,1 P1,2.P1,n-1 P1,n 00 00 00 . 00 00 00 00 00 00 . 00 00 00 Pm-1,0 Pm-1,1.Pm-1,n-1 Pm-1,n Pm,0 Pm,1.Pm,n-1 Pm,n 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 VALID IMAGE HORIZONTAL BLANKING VERTICAL BLANKING VERTICAL/HORIZONTAL BLANKING LINE_VALID PIXCLK DOUT9-DOUT0 . . . . . . . . . . . . . . . . P0 (9:0) P1 (9:0) P2 (9:0) P3 (9:0) P4 (9:0) Pn-1 (9:0) Pn (9:0) Blanking Valid Image Data Blanking