AHDL Training Class Danny Mok Altera HK FAE (amok@altera.com) Copyright 1997 Altera Corporation 2/22/2021P1 favara
Copyright © 1997 Altera Corporation 2/22/2021 P.1 AHDL Training Class Danny Mok Altera HK FAE (dmok@altera.com)
What is ahdl Altera Hardware Description Language develop by Altera ntegrate into the altera software Max+ Plus ll description the hardware in language instead of graphic easy to modify ° easy to maintane very good for complex combinational logic BCD to 7 Segment converter address decoding state machine more than you want Copyright 1997 Altera Corporation 2/22/2021P2 favara
Copyright © 1997 Altera Corporation 2/22/2021 P.2 What is AHDL ◼ Altera Hardware Description Language – develop by Altera – integrate into the Altera software Max+Plus II – description the hardware in language instead of graphic • easy to modify • easy to maintane – very good for • complex combinational logic – BCD to 7 Segment converter – address decoding • state machine • more than you want……
continue As easy as Graphic Entry As powerful as HDL (Hardware Description Language) -ⅥHDL, Verilog hdl etc Copyright 1997 Altera Corporation 2/22/2021P favara
Copyright © 1997 Altera Corporation 2/22/2021 P.3 continue... ◼ As easy as Graphic Entry ◼ As powerful as HDL (Hardware Description Language) – VHDL, Verilog HDL etc
How to use the adhl use any text editor to create the file Altera Software Max+ Plus l provide text editor ww MAX+plus II Manager-UntitledI MA+plus ll File Assign Optior 口囝回圖圖画圖回圆國國國囫為圖圓 图 Untitled4- Text Editor Click the button Type in your AHDL design file Line 1 Col 1 INS 4 Copyright 1997 Altera Corporation 2/22/2021P4 favara
Copyright © 1997 Altera Corporation 2/22/2021 P.4 How to use the ADHL ◼ use any text editor to create the file – Altera Software Max+Plus II provide text editor Click the button Type in your AHDL design file
continue ■ Create your ahdl file MA+plus lI File Edit Templates Assign Utilities Options window Help 國 daisy.tdf:Te溅Edar SUBDESIGN daisy /local request :INPUT; /local grant OUTPUT. INPUT: From lower priority /request out OUTPUT 2 to higher priority /grant in 客 From higher priority客 /grant out OUTPUT 客 to lower priority BEGIN DEFAULTS /local grant =UCC; 客 active-1 ow output /request out 2 signals should default ran 2 to UCC END DEFAULTS: I INS 4 Copyright 1997 Altera Corporation 2/22/2021P favara
Copyright © 1997 Altera Corporation 2/22/2021 P.5 continue….. ◼ Create your AHDL file
continue save your adhl file as name. TDF □回 SUBDESIGN daisy Must be calrequest INPUT: daisy. tdf I NPUT Directory is: d: \maxw2work the same /request out OUTPU Files Directories /grant in /grant out OUTPUT BEGIN DEFAULTS /local grant UCC: /grant out UCC END DEFAULTS Automatic Extension tdf Line 1 Col 1 INS 4I Copyright 1997 Altera Corporation 2/22/2021P favara
Copyright © 1997 Altera Corporation 2/22/2021 P.6 continue….. ◼ save your ADHL file as name.TDF Must be the same
continue UBDESIGN daisy /local reques NPUT; OUTPUT INPUT: from lower priority Click /request out OUTPUT: to higher priority n this MA+ olug ll File已oces nterlaces Assign Options window Help □口k Info: Chip'daisysuccessfully fit into AuTo device MAX+plus lI-Comt L Message of 2 Help on Message」 L locate> of0 I Locate: A K GND THEN /local grant GND Line cOl INS 4I Copyright 1997 Altera Corporation 2/22/2021P7 favara
Copyright © 1997 Altera Corporation 2/22/2021 P.7 continue... Click on this icon
Error Location during Compilation Easy to locate the error 四区 园回圈画 /local UCC: g active-low output /request out signals should default END DEFAULTS Netlist IF /request_in ==GND /local request ==fND_- Error /request out location IF /grant in ==GND THEN IF /local request = GND /loca ELSIF /request in==GND m Click the /grant out =GND: END IF error Line 18 Col 23 INS 4 Message卜10of1 Locate in Floorplan Editor Help on Message message 4 L Locate All Copyright 1997 Altera Corporation Click the Locate button 2/22/2021P favara
Copyright © 1997 Altera Corporation 2/22/2021 P.8 Error Location during Compilation ◼ Easy to locate the error Click the error message Click the Locate button Error location
AHDL Template If-then-else Fo M4X+plus l Fle Edit Iemplates Assign u ities Options Window Hep forgot case-end case loop-end loop IF expression THEN statement statement ELSIF /expression THEN Statemen statement ELSE statement statement Modify the code Copyright 1997 Altera Corporation 2/22/2021P favara
Copyright © 1997 Altera Corporation 2/22/2021 P.9 AHDL Template I forgot ……. If-then-else case-end case loop-end loop ??…??? Modify the code
General AHdl Format subdeSign decode Key Word input pin name: INPUT nput bus name 15.0]: INPUT Defien 1/0 port output pin name: OUTPUT output bus name: OUTPUT BEGIN ouptut pin name- input pin name gi output bus name=input bus name END AHDL format Copyright 1997 Altera Corporation 2/22/2021P10 favara
Copyright © 1997 Altera Corporation 2/22/2021 P.10 General AHDL Format SUBDESIGN decode1 ( input_pin_name : INPUT; input_bus_name[15..0] : INPUT; output_pin_name : OUTPUT; output_bus_name : OUTPUT; ) BEGIN ouptut_pin_name = input_pin_name; output_bus_name = input_bus_name; END; Key Word Defien I/O port Logic AHDL format
