A 975 to 1960 MHz,Fast-Locking Fractional-N Synthesizer with Adaptive Bandwidth Control and 4/4.5 Prescaler for Digital TV Tuners Lei Lu1,2,Zhichao Gong1.2,Youchun Liao2, Hao Min1,Zhangwen Tang 1 Fudan University,Shanghai,China 2 Ratio Microelectronics,Shanghai,China 件
A 975 to 1960 MHz, Fast-Locking FractionalN Synthesizer with Adaptive Bandwidth Control and 4/4.5 Prescaler for Digital TV Tuners Lei Lu1,2, Zhichao Gong1,2, Youchun Liao 2 , Hao Min 1, Zhangwen Tang 1 1 Fudan University, Shanghai, China 2 Ratio Microelectronics, Shanghai, China
Outline ·Motivation Synthesizer Architecture ·Proposed Techniques >Adaptive Bandwidth Control Division-Ratio-Based AFC Technique >4/4.5 Prescaler ·Measurement Results ·Conclusions 2009 IEEE International Solid-State Circuits Conference 2009 IEEE
© 2009 IEEE International Solid-State Circuits Conference © 2009 IEEE 2 Outline • Motivation • Synthesizer Architecture • Proposed Techniques ¾Adaptive Bandwidth Control ¾Division-Ratio-Based AFC Technique ¾4/4.5 Prescaler • Measurement Results • Conclusions
Motivation Digital TV tuners need a wideband frequency synthesizer such as DVB-T Loop bandwidth changes greatly during a wide frequency range Wideband VCO needs AFC to select the sub- band automatically Low phase noise and low phase error are required in the receiver 2009 IEEE International Solid-State Circuits Conference 2009 IEEE 3
© 2009 IEEE International Solid-State Circuits Conference © 2009 IEEE 3 Motivation • Digital TV tuners need a wideband frequency synthesizer such as DVB-T • Loop bandwidth changes greatly during a wide frequency range • Wideband VCO needs AFC to select the subband automatically • Low phase noise and low phase error are required in the receiver
Pros Cons ·Advantages Loop bandwidth is adaptively controlled Residual fractional error is reduced and VCO clock is counted directly Lower phase noise due to the 4/4.5 prescaler Measured low phase noise,low phase error and fast locking time ·Disadvantages >The 4/4.5 prescaler leads to a little bit higher power The fractional spur is high when fractional modulus is close to 0 or 1 2009 IEEE International Solid-State Circuits Conference 2009 IEEE
© 2009 IEEE International Solid-State Circuits Conference © 2009 IEEE 4 Pros & Cons • Advantages ¾ Loop bandwidth is adaptively controlled ¾ Residual fractional error is reduced and VCO clock is counted directly ¾ Lower phase noise due to the 4/4.5 prescaler ¾ Measured low phase noise, low phase error and fast locking time • Disadvantages ¾ The 4/4.5 prescaler leads to a little bit higher power ¾ The fractional spur is high when fractional modulus is close to 0 or 1
Synthesizer Block Diagram 8 8 AFC 4 MSBs fref 25MHZ 2 千o PFD 0.975~ 1.96GHz R 尘 S2 LPF VCO Differential CP Double-edge P/S Prescaler Retiming Counter 4/4.5 F2202929 3rd-order 3 9 DSM 9 Dithering N[7:0]+.F[23] 2009 IEEE International Solid-State Circuits Conference 2009 IEEE 5
© 2009 IEEE International Solid-State Circuits Conference © 2009 IEEE 5 Synthesizer Block Diagram LPF Prescaler 4/4.5 P/S Counter Double-edge Retiming PFD 3rd-order DSM Dithering AFC 8 Vref fref s1 25MHz s1 R1 R1 C1/2 C 2 C 2 R 3 R 3 C 3 C 3 Vref s1 s1 s 2 s 2 VCO fout 0.975~ 1.96GHz 23 3 23 .F[22:0] N[7:0]+.F[23] 9 9 Differential CP 4 MSBs 8
Loop Bandwidth Loop bandwidth=Kvco RC 2πfeo C+C2+C3 Kvco and fyco are two factors affecting loop bandwidth Maintain loop bandwidth Output frequency fco varies greatly across the wide range,but Icp also is tuned to compensate fyco >Kyco is maintained Then the loop bandwidth is adaptively controlled across the whole frequency range 2009 IEEE International Solid-State Circuits Conference 2009 IEEE 6
© 2009 IEEE International Solid-State Circuits Conference © 2009 IEEE 6 Loop Bandwidth • KVCO and fvco are two factors affecting loop bandwidth • Maintain loop bandwidth ¾ Output frequency fvco varies greatly across the wide range, but ICP also is tuned to compensate fvco ¾ KVCO is maintained ¾ Then the loop bandwidth is adaptively controlled across the whole frequency range CP VCO ref 1 1 vco 1 2 3 Loop bandwidth 2 = ⋅ + + IK f R C πf CCC
Simplified LC-tank of Multiband VCO Switched capacitors and Vosc+ Vosc- 00001 switched varactors are both Capacitor array adjusted simultaneously with different values of units to maintain both Kyco and 1C25Cn2502550 band steps a~a255 and B~B255 are programmed coefficients YC. 米 See [Lu,et al.,IEEE RFIC Symp.,2008] B2sc米 Varactor array Only LC-tank depicted 2009 IEEE International Solid-State Circuits Conference 2009 IEEE
© 2009 IEEE International Solid-State Circuits Conference © 2009 IEEE 7 Simplified LC-tank of Multiband VCO • Switched capacitors and switched varactors are both adjusted simultaneously with different values of units to maintain both KVCO and band steps • α1 ~ α255 and β1 ~ β255 are programmed coefficients • See [Lu, et al., IEEE RFIC Symp., 2008] f 1 f ctrl osc+ oscen1 255 f f 1 f 255 f en255 v v 1 v 1 v en1 255 v 255 v en255 B ctrl B ctrl LC
Multiband VCO Calibration Using AFC The purpose of AFC is to select the sub-band of VCO whose center frequency is closest to the target frequency automatically Frequency middle 255 k+1 k △f k-1 Compare the distance ftarget and choose the nearest point to the middle! Linear Range (AVc)Vctrl Vclo Vchi 2009 IEEE International Solid-State Circuits Conference 2009 IEEE 8
© 2009 IEEE International Solid-State Circuits Conference © 2009 IEEE 8 Multiband VCO Calibration Using AFC • The purpose of AFC is to select the sub-band of VCO whose center frequency is closest to the target frequency automatically
Conventional AFC ● Frequency comparison by counter 0 Selected fyco is closest to N*fref,not(N+.F)*frer >Residual fractional error.F*frer is generated fref Counter Shift VCO band Comparator 千d Counter N+.F Divider fvco Multiband VCO DSM 2009 IEEE International Solid-State Circuits Conference 2009 IEEE 9
© 2009 IEEE International Solid-State Circuits Conference © 2009 IEEE 9 Conventional AFC • Frequency comparison by counter • Selected fvco is closest to N* fref, not ( N+. F)* fref ¾ Residual fractional error . F* fref is generated ref div ref vco
Division-Ratio-Based AFC Π E=Ncntr-Ndec Counter VCO Clock Comparison fvco Ndec=p*(N.Fdec) 口门 Decoded by Band shift VCO Ref.Clock ÷p division ratio AFC: Iref 一一一 27 ●●●20 2122232425●●●224 Division RatioX XXXXXXX.XXX XX●●。X N.F Integer modulus Fractional modulus Decoding modulus(N.Fdec) Fractional error Decoding→Ndec Ndec is decoded from the division ratio N.Fdec, >Residual fractional error is reduced to 24*fer 2009 IEEE International Solid-State Circuits Conference 2009 IEEE 10
© 2009 IEEE International Solid-State Circuits Conference © 2009 IEEE 10 Division-Ratio-Based AFC • Ndec is decoded from the division ratio N.Fdec, ¾ Residual fractional error is reduced to 2-4 * fref
