A Low-phase-noise 1-GHz LC VCO Differentially Tuned by Switched Step Capacitors Zhangwen Tang,Jie He and Hao Min ASIC System State Key Laboratory,Fudan University,Shanghai 200433,China (zwtang,jiehe,hmin)@fudan.edu.cn Abstract-This paper proposes a novel 1-GHz LC oscillator differentially tuned by switched step capacitors,which is implemented in a 0.25um 1P5M CMOS process.A period Mp calculation technique (PCT)is adopted to analyze the Mp2 differential tuning characteristic of switched step capacitors. Due to the symmetric oscillation waveforms,the differentially tuned LC VCO has 7 dB phase noise reduction in the 1/f region compared to the single-ended tuned topology,and 23.6dB CMRR.It achieves phase noise -83 dBc/Hz,-107 dBc/Hz and-130 dBc/Hz respectively at 10-kHz,100-kHz and 1-MHz offsets,while dissipating 3.3 mA current at 2.6 V power C supply.Chip size is 0.82 mm X0.84 mm. Mn I.INTRODUCTION Due to the common-mode noise in LC oscillators,such as the noise at control voltages,power supply or in tail current, (V) C(V) there exists large close-in phase noise up-converted by AM- (a) (c) to-PM mechanism from low-frequency flicker noise [1,2]. The differentially tuned LC oscillators have an advantage of Fig.1.CMOS differentially tuned LC-tank VCO,(a)LC-tank common-mode noise suppression as well as other VCO,(b)Simplified half circuit,(c)Step C-V curves differential circuits.However.the implementation of describes the actual implementation of a novel 1-GHz differentially tuned LC oscillators is not easy. CMOS LC VCO differentially tuned by switched step Two p-n diode varactors connected in anti-parallel configuration can implement differentially tuned topology capacitors.Section IV presents the measured F-V curves, [2].But positive and negative tuning voltages have only voltage-to-frequency gain Kvco curves and phase noise. Finally,conclusions are drawn in Section V. Vpp/2 tuning range in order to prevent the varactors from being forward biased.It is evident that the differentially II.FREQUENCY TUNING CHARACTERISTIC OF diode varactors suffer more severely from the AM-to-PM DIFFERENTIALLY TUNED LC OSCILATORS conversion.Accumulation MOS varactors in CMOS process cannot offer symmetric characteristics of anode and cathode A differentially tuned LC oscillator,shown in Fig.1(a), compared to SOI technology [3].AC coupling varactors is a consists of positive-step varactors and negative-step viable way to mitigate their non-linearity and in turn the varactors.The presence of on-chip inductors in Fig.1(a) effects of AM noise.However,the reduction of the C-V imposes that the dc value of differential oscillation voltages nonlinearity is typically paid in terms of narrower tuning must be a constant voltage Vac.Neglecting the tank losses of range [2,4]. on-chip inductors and varactors,the simplified half circuit A novel LC VCO is proposed in this paper,which is of LC-tank VCO can be considered as a series or parallel differentially tuned by a pair of positive and negative step LC tank [1,6].Without loss of generality,a series LC tank, capacitors [6].The positive and negative tuning voltages can shown in Fig.1(b),is considered here.The small-signal tune from Vss to VDD.And additional Ac coupling capacitance of positive-step and negative-step varactors are capacitors are not required.Due to the symmetric oscillation respectively given by: waveforms,the phase noise in the 1/f region is improved. This paper is organized as follows.In Section II,a period V≥Vsm Positive-step capacitor:CV)= calculation technique (PCT)is proposed to analyze the differentially tuning characteristic,and explain in detail why the phase noise in the differentially tuned topology is better than that in the single-ended tuned topology.Section III Neative-stp.C()C (1) This work was supported in part by the Shanghai Science Technology Committee,P.R.China under System-Design-Chip(SDC)program(NO 037062019)and Shanghai AM (Applied Material)Funds (NO.0425)
A Low-phase-noise 1-GHz LC VCO Differentially Tuned by Switched Step Capacitors Zhangwen Tang, Jie He and Hao Min ASIC & System State Key Laboratory, Fudan University, Shanghai 200433, China {zwtang, jiehe, hmin}@fudan.edu.cn Abstract—This paper proposes a novel 1-GHz LC oscillator differentially tuned by switched step capacitors, which is implemented in a 0.25µm 1P5M CMOS process. A period calculation technique (PCT) is adopted to analyze the differential tuning characteristic of switched step capacitors. Due to the symmetric oscillation waveforms, the differentially tuned LC VCO has 7 dB phase noise reduction in the 1/f3 region compared to the single-ended tuned topology, and 23.6dB CMRR. It achieves phase noise –83 dBc/Hz, –107 dBc/Hz and –130 dBc/Hz respectively at 10-kHz, 100-kHz and 1-MHz offsets, while dissipating 3.3 mA current at 2.6 V power supply. Chip size is 0.82 mm×0.84 mm. I. INTRODUCTION Due to the common-mode noise in LC oscillators, such as the noise at control voltages, power supply or in tail current, there exists large close-in phase noise up-converted by AMto-PM mechanism from low-frequency flicker noise [1, 2]. The differentially tuned LC oscillators have an advantage of common-mode noise suppression as well as other differential circuits. However, the implementation of differentially tuned LC oscillators is not easy. Two p-n diode varactors connected in anti-parallel configuration can implement differentially tuned topology [2]. But positive and negative tuning voltages have only VDD/2 tuning range in order to prevent the varactors from being forward biased. It is evident that the differentially diode varactors suffer more severely from the AM-to-PM conversion. Accumulation MOS varactors in CMOS process cannot offer symmetric characteristics of anode and cathode compared to SOI technology [3]. AC coupling varactors is a viable way to mitigate their non-linearity and in turn the effects of AM noise. However, the reduction of the C-V nonlinearity is typically paid in terms of narrower tuning range [2,4]. A novel LC VCO is proposed in this paper, which is differentially tuned by a pair of positive and negative step capacitors [6]. The positive and negative tuning voltages can tune from VSS to VDD. And additional AC coupling capacitors are not required. Due to the symmetric oscillation waveforms, the phase noise in the 1/f3 region is improved. This paper is organized as follows. In Section II, a period calculation technique (PCT) is proposed to analyze the differentially tuning characteristic, and explain in detail why the phase noise in the differentially tuned topology is better than that in the single-ended tuned topology. Section III describes the actual implementation of a novel 1-GHz CMOS LC VCO differentially tuned by switched step capacitors. Section IV presents the measured F-V curves, voltage-to-frequency gain KVCO curves and phase noise. Finally, conclusions are drawn in Section V. II. FREQUENCY TUNING CHARACTERISTIC OF DIFFERENTIALLY TUNED LC OSCILATORS A differentially tuned LC oscillator, shown in Fig. 1(a), consists of positive-step varactors and negative-step varactors. The presence of on-chip inductors in Fig. 1(a) imposes that the dc value of differential oscillation voltages must be a constant voltage Vdc. Neglecting the tank losses of on-chip inductors and varactors, the simplified half circuit of LC-tank VCO can be considered as a series or parallel LC tank [1, 6]. Without loss of generality, a series LC tank, shown in Fig. 1(b), is considered here. The small-signal capacitance of positive-step and negative-step varactors are respectively given by: Positive-step capacitor: , , , , , ( ) ≥ = < max n os n ss n min n os n C VV C V C VV , Negative-step capacitor: , , , , , ( ) ≥ = < min p os p ss p max p os p C VV C V C VV . (1) This work was supported in part by the Shanghai Science & Technology Committee, P.R.China under System-Design-Chip (SDC) program (NO. 037062019) and Shanghai AM (Applied Material) Funds (NO. 0425). L Vctrln Mn1 Mn2 Mp1 Mp2 Mn3 L Vdc L Css,p(V) Vdc Cmax,n Cmin,n Vos,nV Css,n(V) V (a) (c) Vdd Vss Vctrlp Cvp Cvp Cvn Cvn Css,n(V) Cmax,p Cmin,p Vos,p V Css,p(V) I Vcom Vtune -Vtune VVV effn com tune = + VVV effp com tune = − (b) 0 0 Fig. 1. CMOS differentially tuned LC-tank VCO, (a) LC-tank VCO, (b) Simplified half circuit, (c) Step C-V curves
Oscillating Voltage Waveforms Case(t):Vs-A =82,V2V .=1.0V (Case 2)case(2):V2A =0.5V (Case 4)Case(3):-AV>Vm -'4 A =82,'≥V (2) mdCmid Auid) where e satisfies AA1.When V=0,6=1,and V=Vde,three equations of(2)satisfy -0.5V (Case 1) I-C Aid=n A (3) T,=T-TTs 15i… =-0.25V(Case3) where Imax is the maximum current in the inductor. The oscillation period is a sum of three intervals 0.20.4 0.60.8 1.2 Time(ns) T=T+T2+T3,shown in Fig.2.T1,T2 and T3 are respectively a time interval of the first,second and third Fig.2.Oscillation voltage waveforms segmental sinusoids.From(3),we obtain the amplitude ratio where Vosn and Vsp are C-V voltage offsets.Ven and Veudp (4) are the control voltages,and we define Vem=Vmin+Vos.m and Vp-Vmp+Vasp effective control voliages (ECV)of When the oscillation voltage equals Vemp(or Verm),we define positive-step and negative-step varactors.The common- the inductor current I=Iemp(or Iem).Substituting (4)in the mode tuning voltage is Vcom=(Vem+Vemp)/2, and the first(or last)two equations of(2)and eliminating Iemp(or Iem) differential tuning voltage is Ve Thus,the positive tuning lead to the ESF ECV Vem is Vcom+Vten,and the negative tuning ECV Vep is Vcom-Vtune.For the sake of the symmetric tuning characteristics,Veom normally equals Vde,and Cmin.n=Cminp, (5) A Cmax,n=Cmax.p Thus,the oscillation period is A.Period Calculation Technique In [6],a period calculation technique was first introduced π-2sim 2sin to analyze a single-ended tuned LC oscillator.Here,it is T=T+T+T= mid 十 adopted to calculate the oscillation period of a differentially tuned LC oscillator. (6) Fig.2 shows oscillation voltage waveforms of a series where T=2元√LC and T-2元√DCna LC tank.The ECV voltages Vem and Vemp control the small- signal capacitance Csn and Css.p to be a minimum or B.Advantage of Suppressing AM-PM Conversion maximum.Therefore,each waveform consists of three segmental sinusoids of different sizes,which join at ECVs. At any control voltage,in Fig.2,the first segmental With the differential tuning voltage Vune changes from low sinusoid is symmetric to the third one.The oscillation voltage waveform in a differentially tuned LC VCO always to high,there exist four cases. For example,Case(3)is -AminVde,Where Amin is the VCO has asymmetric waveform in the whole tuning range minimum oscillation amplitude.When the oscillation voltage [6].Therefore,the differentially tuned application has an is above Vemp the equivalent capacitance of the LC tank is advantage of suppressing the up-conversion by AM-to-PM Cmid=Cmax.n+Cminp;when the oscillation voltage is below mechanism from low-frequency flicker noise at power Vemp and above Verm,the equivalent capacitor is supply and tail current [7]. Cma=Cmax.n+Cmaxp:when the oscillation voltage is below In a single-ended tuned LC VCO,the oscillation Vep,the equivalent capacitor is Cmid=Cminn+Cmax.p. Thus the frequency sensitivity to the common-mode noise is the same oscillation waveform comprises three segmental sinusoids as the voltage-to-frequency gain Kvco.So the low-frequency joined at Ver and Vemp ECVs.One is over Verp with phase noise converted by the AM-FM conversion from the amplitude A(is an ellipse similar factor.ESF[6)and common-mode noise can only be filtered by the low- bandwidth PLL closed loop.From (6),we can conclude that frequency the second is below Vemp and above Vem the oscillation period is insensitive to the common-mode with amplitude Amin and frequency the third is below voltage.So the sensitivity is Kvco.coMVcoM=0. Ve with amplitude A and frequencyThe I-V locus Therefore,a differentially tuned LC VCO itself has an of three segmental sinusoids holds advantage of suppressing the common-mode noise from control voltages,power supply,and tail current
where Vos,n and Vos,p are C-V voltage offsets. Vctrln and Vctrlp are the control voltages, and we define Veffn=Vctrln+Vos,n and Veffp=Vctrlp+Vos,p effective control voltages (ECV) of positive-step and negative-step varactors. The commonmode tuning voltage is Vcom=(Veffn+Veffp)/2, and the differential tuning voltage is Vtune. Thus, the positive tuning ECV Veffn is Vcom+Vtuen, and the negative tuning ECV Veffp is Vcom-Vtune. For the sake of the symmetric tuning characteristics, Vcom normally equals Vdc, and Cmin,n=Cmin,p, Cmax,n=Cmax,p. A. Period Calculation Technique In [6], a period calculation technique was first introduced to analyze a single-ended tuned LC oscillator. Here, it is adopted to calculate the oscillation period of a differentially tuned LC oscillator. Fig. 2 shows oscillation voltage waveforms of a series LC tank. The ECV voltages Veffn and Veffp control the smallsignal capacitance Css,n and Css,p to be a minimum or maximum. Therefore, each waveform consists of three segmental sinusoids of different sizes, which join at ECVs. With the differential tuning voltage Vtune changes from low to high, there exist four cases. For example, Case(3) is −AminVeffp>Vdc, where Amin is the minimum oscillation amplitude. When the oscillation voltage is above Veffp, the equivalent capacitance of the LC tank is Cmid=Cmax,n+Cmin,p; when the oscillation voltage is below Veffp and above Veffn, the equivalent capacitor is Cmax=Cmax,n+Cmax,p; when the oscillation voltage is below Veffp, the equivalent capacitor is Cmid=Cmin,n+Cmax,p. Thus the oscillation waveform comprises three segmental sinusoids joined at Veffn and Veffp ECVs. One is over Veffp with amplitudeθ Amid (θ is an ellipse similar factor, ESF [6]) and frequency ω mid ; the second is below Veffp and above Veffn with amplitude Amin and frequencyω min ; the third is below Veffn with amplitudeθ Amid and frequencyω mid . The I-V locus of three segmental sinusoids holds 2 2 2 − + = dc mid mid mid mid V V I A CA θ ω , V V≥ effp 2 2 1 − + = dc min min max min V V I A CA ω , V VV effp effn > > 2 2 2 − + = dc mid mid mid mid V V I A CA θ ω , V V effn ≥ (2) where θ satisfies ≤ ≤ 1 A A min mid θ .When Vt=0, 1 θ = , and V=Vdc, three equations of (2) satisfy Imax mid mid mid min max min = = ω ω CA CA (3) where Imax is the maximum current in the inductor. The oscillation period is a sum of three intervals T=T1+T2+T3, shown in Fig. 2. T1, T2 and T3 are respectively a time interval of the first, second and third segmental sinusoids. From (3), we obtain the amplitude ratio = min mid mid max A C A C (4) When the oscillation voltage equals Veffp (or Veffn), we define the inductor current I=Ieffp (or Ieffn). Substituting (4) in the first (or last) two equations of (2) and eliminating Ieffp (or Ieffn) lead to the ESF θ 2 2 1 =− + tune tune min mid V V A A θ (5) Thus, the oscillation period is 1 1 123 2 2 − − − − − =++= + tune tune mid min mid max V V sin sin A A TTTT T T π θ π π (6) where = π2 T LC mid mid and = π2 T LC max max . B. Advantage of Suppressing AM-PM Conversion At any control voltage, in Fig. 2, the first segmental sinusoid is symmetric to the third one. The oscillation voltage waveform in a differentially tuned LC VCO always remains symmetric. However, a single-ended tuned LC VCO has asymmetric waveform in the whole tuning range [6]. Therefore, the differentially tuned application has an advantage of suppressing the up-conversion by AM-to-PM mechanism from low-frequency flicker noise at power supply and tail current [7]. In a single-ended tuned LC VCO, the oscillation frequency sensitivity to the common-mode noise is the same as the voltage-to-frequency gain KVCO. So the low-frequency phase noise converted by the AM-FM conversion from the common-mode noise can only be filtered by the lowbandwidth PLL closed loop. From (6), we can conclude that the oscillation period is insensitive to the common-mode voltage. So the sensitivity is K V0 VCO,COM 0 COM = ∂ω ∂ = . Therefore, a differentially tuned LC VCO itself has an advantage of suppressing the common-mode noise from control voltages, power supply, and tail current. Vdc Vtune=1.0V (Case 2) Vtune=0.5V (Case 4) Vtune=-0.5V (Case 1) Vtune=-0.25V (Case 3) T3 T1 T T2=T-T1-T3 ≤ − ≥ −< < < < tune min tuen max min tune tune max Case(1) : V A Case(2) : V A Case(3) : A V 0 Case(4) : 0 V A A max Amin Veffp Veffn Fig. 2. Oscillation voltage waveforms
,1000/4 1000/4 C,23pF 28nH Direct-connected Mode 6) 180/0.24 180/0.241 Mpl Mp2 60/0.24 60/0.24 C nc Mp7 20024a Mp8 RF 3 C=C=288 V图 Y C=C,=1.701pF Cross-connected Mode C=C=288 (a) (c) 学 Mp3,Mp4:96/0.6 Fig.3.Equivalent circuit of a step MOS capacitor Mn3,Mn4:96/0.6 III.CIRCUIT IMPLEMENTAION Mnl Mn2 240/0.5 240/0.5 From the frequency tuning analyses in 6],we can conclude that any capacitor with a step C-V characteristic can be used to implement a LC VCO with a linear F-V 28n curve.In this section,a novel equivalent circuit with a step C-V curve is proposed to implement a LC VCO. Fig.4.LC oscillator differentially tuned by switched step capacitors A.Switched Step Capacitors An equivalent circuit of a step MOS capacitor is shown 20042到 in Fig.3(a),which comprises two Metal-Insulator-Metal 2T0 (MIM)capacitors and a switching NMOS transistor. Neglecting the body effect and parasitic capacitors of MOS transistor,if the voltage between VG and Verl satisfies VG- Vet<Vthn,the capacitance of an equivalent circuit is a minimum,Cmin=C1;and otherwise it is a maximum, Cmax=CI+C2.On selection of capacitors Cl and C2.any capacitance ratio can be obtained.There exist two kinds of differential topologies with two back-to-back switched step varactors.One structure is the direct-connected mode,as shown in Fig.3(b),in which the oscillation voltages (X and Y)control the varactors in the same side.The other is the cross-connected mode,as shown in Fig.3(c),in which the oscillation voltages control the opposite varactors.Noticing RFp G RF that the oscillation voltages Vx and Vy are differential,the SpectraRF simulation shows that the cross-connected Fig.5.Microphotograph of differentially tuned LC VCO topology is better than the direct-connected topology in differential LC VCOs in terms of phase noise. (28nH each),resonate at double frequency with the parasitic B.Differentially Tuned LC Oscillator capacitors (C:Ca)at each common-source node,avoiding A differentially tuned LC-VCO is shown in Figure 4,in Q-degradation by triode region MOS transistors in the which the tank consists of an on-chip differential inductor L stacked differential pairs.The current mirrors,Mp5 and and switched step capacitors.The NMOS transistors Mn3- Mp6,provide enough current to generate a large voltage swing in the current-limited mode.MIM capacitors C and Mn4 and MIM capacitors Cni-Cn2 form a positive-step capacitor,and PMOS transistors Mp3-Mp4 and MIM C2 are added to adjust the center frequency. capacitors Cpl-Cp2 generate a negative-step capacitor.In IV.MEASUREMENT VALIDATIONS order to reduce common-mode voltage-to-frequency gain, positive-step capacitors (CnI-Cn2)must completely equal The prototype circuit was manufactured in a 0.25um negative-step ones(CpI-Cp2).The zero threshold transistors, 1P5M CMOS process,and its microphotograph is shown in NMOS Mn3-Mn4 and PMOS Mp3-Mp4,are used to Fig.5.The oscillator IC operates from 2.6 V and biases at eliminate the offset of F-V tuning curve,and to improve the 3.3mA.Chip-On-Board(COB)packaged chips are measured Common-Mode Rejection Ratio (CMRR)of voltage-to- on an Agilent E4440A(3Hz~26.5GHz)PSA Serial Spectrum frequency gain Kvco.Two additional inductors,LI&L2 Analyzer with Phase Noise Module
III. CIRCUIT IMPLEMENTAION From the frequency tuning analyses in [6], we can conclude that any capacitor with a step C-V characteristic can be used to implement a LC VCO with a linear F-V curve. In this section, a novel equivalent circuit with a step C-V curve is proposed to implement a LC VCO. A. Switched Step Capacitors An equivalent circuit of a step MOS capacitor is shown in Fig. 3(a), which comprises two Metal-Insulator-Metal (MIM) capacitors and a switching NMOS transistor. Neglecting the body effect and parasitic capacitors of MOS transistor, if the voltage between VG and Vctrl satisfies VGVctrl<Vthn, the capacitance of an equivalent circuit is a minimum, Cmin=C1; and otherwise it is a maximum, Cmax=C1+C2. On selection of capacitors C1 and C2, any capacitance ratio can be obtained. There exist two kinds of differential topologies with two back-to-back switched step varactors. One structure is the direct-connected mode, as shown in Fig. 3(b), in which the oscillation voltages (X and Y) control the varactors in the same side. The other is the cross-connected mode, as shown in Fig. 3(c), in which the oscillation voltages control the opposite varactors. Noticing that the oscillation voltages VX and VY are differential, the SpectraRF simulation shows that the cross-connected topology is better than the direct-connected topology in differential LC VCOs in terms of phase noise. B. Differentially Tuned LC Oscillator A differentially tuned LC-VCO is shown in Figure 4, in which the tank consists of an on-chip differential inductor L and switched step capacitors. The NMOS transistors Mn3- Mn4 and MIM capacitors Cn1-Cn2 form a positive-step capacitor, and PMOS transistors Mp3-Mp4 and MIM capacitors Cp1-Cp2 generate a negative-step capacitor. In order to reduce common-mode voltage-to-frequency gain, positive-step capacitors (Cn1-Cn2) must completely equal negative-step ones (Cp1-Cp2). The zero threshold transistors, NMOS Mn3-Mn4 and PMOS Mp3-Mp4, are used to eliminate the offset of F-V tuning curve, and to improve the Common-Mode Rejection Ratio (CMRR) of voltage-tofrequency gain KVCO. Two additional inductors, L1 & L2 (28nH each), resonate at double frequency with the parasitic capacitors (C3 & C4) at each common-source node, avoiding Q-degradation by triode region MOS transistors in the stacked differential pairs. The current mirrors, Mp5 and Mp6, provide enough current to generate a large voltage swing in the current-limited mode. MIM capacitors C1 and C2 are added to adjust the center frequency. IV. MEASUREMENT VALIDATIONS The prototype circuit was manufactured in a 0.25µm 1P5M CMOS process, and its microphotograph is shown in Fig. 5. The oscillator IC operates from 2.6 V and biases at 3.3mA. Chip-On-Board (COB) packaged chips are measured on an Agilent E4440A (3Hz~26.5GHz) PSA Serial Spectrum Analyzer with Phase Noise Module. C1 //C2 C1 Vthn VG-Vctrl CV(V) Mn C C2 1 Vctrl VG C2 C2 X Y C2 C2 X Y Vctrl Vctrl C1 C1 C1 C1 M1 M2 M1 M2 Direct-connected Mode Cross-connected Mode (a) (c) (b) Fig. 3. Equivalent circuit of a step MOS capacitor Mn1 Mn2 Mp1 Mp2 L Vdd Vss X Y C1 Cp1 Cn1 C2 Cp2 Cn2 Mn3 Mn4 Mp3 Mp4 Vctrlp Vctrln Mp5 RFp RFn I bias L1 C3 L2 C4 C6 C5 Mp6 Mp7 Mp8 1000 4 1000 4 28nH 28nH 180/ 0.24 180/ 0.24 240/ 0.5 240/0.5 60/ 0.24 9.44nH 60/0.24 Cp1=Cp2=288fF C1 =C2 =1.701pF Cn1=Cn2=288fF Mp3,Mp4 : 96/0.6 Mn3,Mn4 : 96/0.6 1.125pF 1.125pF C7 23pF Fig. 4. LC oscillator differentially tuned by switched step capacitors Fig. 5. Microphotograph of differentially tuned LC VCO
Frequency-Voltage Tuning Curve and Voltage to-Frequecy Gain(KV) 100-kHz offsets from the carrier.Due to the large switching noise from DC-DC converter power supply,there exists ++ Calculation mneasurement worst phase noise at about 500-kHz and 1.5-MHz offsets The differentially tuned VCO at 1.013GHz is biased at Vetrn =0.8V and Vetrlp=1.4V.It measures-83.21 dBc/Hz,-106.93 dBc/Hz and-129.76 dBc/Hz respectively at 10-kHz,100- kHz and 1-MHz offsets. The 1/P phase noise (at 10-kHz offset)in the differentially tuned application has 7 dB reduction compared to the single-ended tuned topology.The differentially tuned 4.72nH: V=0.892V application also has much advantage of suppressing the up- =I 066GH F =0.g79GH￥ conversion by AM-to-FM mechanism from low-frequency =4.726pF =5.604pl flicker noise at power supply 三0.848 0.923V -05 0 0.5 1.5 V.CONCLUSIONS Diferertial Control Voltage(v)[Vctrin-Vctrlp,Common-mode Voltage,1.1V] A period calculation technique (PCT)is adopted to Fig.6.Differentially tuned F-V curve and Kvco gain analyze the frequency-tuning characteristic of a differentially tuned LC VCO.According to PCT,we can conclude that a Carrier PoHer -4.99 dBm Atten 0.00 dB Mkr1 10.0880k42 Ref-52.00dBc/Hz 83.21dBc/H differentially tuned topology has two advantages:the symmetric oscillation waveform and suppressing AM-FM 1.000GHz.single-ended tuned conversion from the common-mode noise at control voltages power supply,and tail current.A novel LC oscillator,which arge Noise from Power Supply is differentially tuned by switched step capacitors,is implemented in a 0.25um IP5M CMOS process.In the 1/f region,the differentially tuned topology has 7dB phase noise 1.013GHz reduction compared to the single-ended tuned topology. differentially ACKNOWLEDGMENT The authors would like to thank Chenbo Liu,Wei Yi,and 10KH2 Frequency Offset Qifeng Jiang of Shanghai Research Center of Integrated Fig.7.Measured phase noise Circuit Design,P.R.China,for the support of MPW service, and thank Hao Huang.Dahong Qian for chip testing A.F-V Tuning Curve Measurements REFERENCES At the common-mode voltage (Verlp+Veurin)/2=1.1 V,the differentially tuned F-V curve and voltage-to-frequency gain [1]S.Levantino,C.Samori,A.Zanchi and A.L.Lacaita,"AM-to-PM conversion in varactor-tuned oscillator"IEEE Trans.on Circuits and Kvco are plotted in Fig.6.The solid line is calculated by the Systems-II.Analog and Digital Signal Processing.vol.49,no.7, theoretic analysis in Section II.And the cross line is the pp.509-513,July2002. measured result,which is in good agreement with the [2] S.Levantino,A.Bonfanti,L.Romano,C.Samori and A.L.Lacaita, theoretic prediction.When the differential control voltage "Differentially-tuned VCO with reduced tuning sensitivity and flicker 2Vue tunes from-2.2 V to 2.2 V,the oscillation frequency noise up-conversion," Analog Integrated Circuits and Signal ranges from 0.979 GHz to 1.066 GHz.The linear tuning Processing,42,21-29,2005 range covers from -1.6 V to 1.1 V with >20MHz/V [3] N.H.W.Fong,J.O.Plouchart,N.Zamdmer,D.Liu,L.F.Wagner, C.Plett and N.G.Tarr,"A 1-V 3.8-5.7-GHz wide-band VCO with differentially tuned voltage-to-frequency gain,which is 77% differential tuned accumulation MOS varactors for common-mode of the tuning range from-2.0 V to 1.5 V noise rejection in CMOS SOI Technology,IEEE Trans.on There exists only 2-MHz difference between common Microwave Theory and Techniques vol.51,pp.1952-1959.Aug. mode control voltages 0 V and 2.6 V.A large frequency 2003. deviation of 8.5-MHz occurs at the middle of 0-2.5 V.The [4] H.Moon,S.Kang,Y.T.Kim,and K.Lee,"A fully differential LC- VCO using a new varactor control structure,"IEEE Microwave and maximum differentially tuned Kvco gain is about 33MHz/V, Wireless Components Letters,vol.14,pp.410-412,Sep.2004. and according to the publication 3],Common-Mode [5] M.Tiebout,"Low-power low-phase-noise differentially tuned Rejection Ratio(CMRR)of Kvco gain is about 23.6 dB quadrature VCO design in standard CMOS,"IEEE J.Solid-State Circuits,vol.36,pp.1018-1024,Jul.2001. B.Phase Noise Measurements [6 Z.Tang,J.He,H.Jian,H.Zhang,J.Zhang,and H.Min,"Prediction The phase noises at about 1.0 GHz.both in the single- of LC-VCO's tuning curves with period calculation technique," Proceeding of IEEE 2005 Asia South Pacific Design Automation ended and differentially tuned applications,are plotted in Conference,Shanghai,P.R.China,pp.687-690,Jan.2005 Fig.7.The single-ended tuned VCO is biased at Vetp=0V [7]A.Hajimiri and T.Lee,"A general theory of phase noise in electrical and Verin=0.9 V.Only Veurn is tuning effective.It measures oscillators,"IEEE J.Solid-State Circuits,vol.33,pp.179-194, -75.97 dBc/Hz,-105.82 dBc/Hz respectively at 10-kHz and Feb.1998
A. F-V Tuning Curve Measurements At the common-mode voltage (Vctrlp+Vctrln)/2=1.1 V, the differentially tuned F-V curve and voltage-to-frequency gain KVCO are plotted in Fig. 6. The solid line is calculated by the theoretic analysis in Section II. And the cross line is the measured result, which is in good agreement with the theoretic prediction. When the differential control voltage 2Vtune tunes from –2.2 V to 2.2 V, the oscillation frequency ranges from 0.979 GHz to 1.066 GHz. The linear tuning range covers from –1.6 V to 1.1 V with >20MHz/V differentially tuned voltage-to-frequency gain, which is 77% of the tuning range from -2.0 V to 1.5 V. There exists only 2-MHz difference between commonmode control voltages 0 V and 2.6 V. A large frequency deviation of 8.5-MHz occurs at the middle of 0~2.5 V. The maximum differentially tuned KVCO gain is about 33MHz/V, and according to the publication [3], Common-Mode Rejection Ratio (CMRR) of KVCO gain is about 23.6 dB. B. Phase Noise Measurements The phase noises at about 1.0 GHz, both in the singleended and differentially tuned applications, are plotted in Fig. 7. The single-ended tuned VCO is biased at Vctrlp=0 V and Vctrln=0.9 V. Only Vctrln is tuning effective. It measures –75.97 dBc/Hz, –105.82 dBc/Hz respectively at 10-kHz and 100-kHz offsets from the carrier. Due to the large switching noise from DC-DC converter power supply, there exists worst phase noise at about 500-kHz and 1.5-MHz offsets. The differentially tuned VCO at 1.013GHz is biased at Vctrln =0.8V and Vctrlp=1.4V. It measures –83.21 dBc/Hz, –106.93 dBc/Hz and –129.76 dBc/Hz respectively at 10-kHz, 100- kHz and 1-MHz offsets. The 1/f3 phase noise (at 10-kHz offset) in the differentially tuned application has 7 dB reduction compared to the single-ended tuned topology. The differentially tuned application also has much advantage of suppressing the upconversion by AM-to-FM mechanism from low-frequency flicker noise at power supply. V. CONCLUSIONS A period calculation technique (PCT) is adopted to analyze the frequency-tuning characteristic of a differentially tuned LC VCO. According to PCT, we can conclude that a differentially tuned topology has two advantages: the symmetric oscillation waveform and suppressing AM-FM conversion from the common-mode noise at control voltages, power supply, and tail current. A novel LC oscillator, which is differentially tuned by switched step capacitors, is implemented in a 0.25µm 1P5M CMOS process. In the 1/f3 region, the differentially tuned topology has 7dB phase noise reduction compared to the single-ended tuned topology. ACKNOWLEDGMENT The authors would like to thank Chenbo Liu, Wei Yi, and Qifeng Jiang of Shanghai Research Center of Integrated Circuit Design, P.R.China, for the support of MPW service, and thank Hao Huang, Dahong Qian for chip testing. REFERENCES [1] S. Levantino, C. Samori, A. Zanchi and A. L. Lacaita, “AM-to-PM conversion in varactor-tuned oscillator” IEEE Trans. on Circuits and Systems-II, Analog and Digital Signal Processing, vol. 49, no.7, pp.509-513, July 2002. [2] S. Levantino, A. Bonfanti, L. Romano, C. Samori and A. L. Lacaita, “Differentially-tuned VCO with reduced tuning sensitivity and flicker noise up-conversion,” Analog Integrated Circuits and Signal Processing, 42, 21-29, 2005 [3] N. H. W. Fong, J. O. Plouchart, N. Zamdmer, D. Liu, L. F. Wagner, C. Plett and N. G. Tarr, “A 1-V 3.8-5.7-GHz wide-band VCO with differential tuned accumulation MOS varactors for common-mode noise rejection in CMOS SOI Technology,” IEEE Trans. on Microwave Theory and Techniques , vol. 51, pp. 1952-1959, Aug. 2003. [4] H. Moon, S. Kang, Y. T. Kim, and K. Lee, “A fully differential LCVCO using a new varactor control structure,” IEEE Microwave and Wireless Components Letters, vol. 14, pp.410-412, Sep. 2004. [5] M. Tiebout, “Low-power low-phase-noise differentially tuned quadrature VCO design in standard CMOS,” IEEE J. Solid-State Circuits, vol. 36, pp. 1018-1024, Jul.2001. [6] Z. Tang, J. He, H. Jian, H. Zhang, J. Zhang, and H. Min, “Prediction of LC-VCO’s tuning curves with period calculation technique,” Proceeding of IEEE 2005 Asia South Pacific Design Automation Conference, Shanghai, P.R.China, pp.687-690, Jan. 2005. [7] A. Hajimiri and T. Lee, “A general theory of phase noise in electrical oscillators,” IEEE J. Solid-State Circuits, vol. 33, pp. 179-194, Feb.1998. L=4.72nH; Vdc=0.892V Fmax=1.066GHz; Fmin=0.979GHz Cmin=4.726pF; Cmax=5.604pF Amin=0.848V Amax=0.923V Fig. 6. Differentially tuned F-V curve and KVCO gain Large Noise from Power Supply Power Supply Noise was suppressed 1.000GHz, single-ended tuned 1.013GHz, differentially tuned Fig. 7. Measured phase noise
